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  • Iowa State University
  • Ames, Iowa
  • 21:10 (UTC -12:00)
  • LinkedIn in/enming-wang

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  1. PS_PL_accelerator PS_PL_accelerator Public

    This is an MAC that utilizes AXI full and AXI lite MMIO to display calculations on PUTTY through UART

    C

  2. 65_percent_keyboard 65_percent_keyboard Public

    This would be my first attempt to make a 65% keyboard pcb and hopefully the shell

    C

  3. CPRE_4880_MPs CPRE_4880_MPs Public

    VHDL

  4. 2026-Summer-LabVIEW-training-projects 2026-Summer-LabVIEW-training-projects Public

    FPGA development projects using a modified LabVIEW-to-FPGA workflow, covering UART, Gigabit Ethernet, DDR3, PCIe/DMA, VHDL integration, simulation, and Artix-7 deployment.

    LabVIEW

  5. 2026-Summer-LabVIEW-translated-to-VHDL-projects 2026-Summer-LabVIEW-translated-to-VHDL-projects Public

    VHDL

  6. CPRE-388-Android-App-Dev CPRE-388-Android-App-Dev Public

    Java