Safe, self-healing bare-metal x86-64 operating system designed for radiation-hardened aerospace systems.
TMR utilities for the SpyDrNet project
A fault-tolerant, pipelined RISC-V processor system implemented in Verilog, featuring Triple Modular Redundancy (TMR), SECDED memory protection, error injection, and robust recovery mechanisms. Designed for research, education, and prototyping of reliable digital systems.
Graduate Level - Fundamental design issues involved in building reliable, safety-critical, and highly available systems. Topics include testing and fault-tolerant design of VLSI circuits, hardware and software fault tolerance, information redundancy, and fault-tolerant distributed systems.
Fault-Tolerant High-Speed Data Acquisition System for Cosmic Ray Muon Detection using Artix-7.
Post-processing tool for the statistical outputs of JRODOS atmospheric dispersion models
A practical implementation of Fault Tolerance and Real-Time Systems concepts on ESP32.
Lightweight Big Rock segmentation on the AI4Mars dataset under space-grade hardware and radiation constraints, with a simulated fault-injection survivability stack.
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