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Here are 5 public repositories matching this topic...

SUHANI102003 / 50-days-of-Verification

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This repo contains the verification basics of System verilog and UVM

systemverilog testbenches uvm edaplayground class-based-verification

Updated Sep 3, 2025
SystemVerilog

ishita-ch / UART-Transmitter

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UART Transmitter using Verilog HDL with FSM-based design and functional verification.

fsm fpga verilog uart vlsi iverilog digital-design rtl-design hardware-design edaplayground

Updated Jun 15, 2026
Verilog

Diya927 / Smart-Home-Automation-Controller-on-FPGA

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A synthesizable Verilog RTL implementation of a priority-driven Smart Home Automation Controller core featuring sensor automation, manual override, and a high-priority emergency hardware load-trip mechanism. Verified via testbench simulation.

fpga systemverilog vlsi digital-design smart-home-automation edaplayground

Updated Jun 19, 2026
Verilog

Balukanuri / custom-uart-transmitter

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A simple UART Transmitter built in Verilog using FSM and tested with Icarus Verilog + GTKWave.

verilog uart gtkwave ece digitaldesign rtldesign edaplayground

Updated Jul 13, 2025
Verilog

rohanrud29-ship-it / washing-machine-controller-verilog

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FPGA-based Washing Machine Controller using Verilog HDL with FSM, sensor synchronization, and simulation testbench.

fsm fpga hardware eda verilog edaplayground

Updated Aug 1, 2026
SystemVerilog

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