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Remove the remaining non-RoCEv2 Verilog from surf #1469

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Merged
ruck314 merged 3 commits into from
Aug 17, 2026
Merged

Remove the remaining non-RoCEv2 Verilog from surf #1469

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8b774d2
refactor(devices): remove Micron DDR3/DDR4 Verilog simulation models
ruck314 Aug 17, 2026
f9b99ef
refactor(saci): remove unused SaciSlaveAnalog.v simulation model
ruck314 Aug 17, 2026
78efe54
refactor(xvc-udp): remove generated UdpDebugBridge Verilog stubs
ruck314 Aug 17, 2026
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23 changes: 0 additions & 23 deletions devices/Micron/ddr3/ruckus.tcl
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703 changes: 0 additions & 703 deletions devices/Micron/ddr3/tb/1024Mb_ddr3_parameters.vh
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691 changes: 0 additions & 691 deletions devices/Micron/ddr3/tb/2048Mb_ddr3_parameters.vh
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691 changes: 0 additions & 691 deletions devices/Micron/ddr3/tb/4096Mb_ddr3_parameters.vh
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526 changes: 0 additions & 526 deletions devices/Micron/ddr3/tb/8192Mb_ddr3_parameters.vh
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