Control-Dependent Performance of SiC Active Rectifiers for Ultra-Low-Voltage, High-Current Electrowinning Power Supplies

A MATLAB/Simulink simulation study investigating the effect of control strategy on SiC active rectifier performance in ultra-low-voltage, high-current electrowinning applications.

Overview

Gold electrowinning rectifiers operate in an unusual electrical regime characterized by very low DC voltage and very high DC current.

This study evaluates whether SiC-based active rectification can achieve suitable power quality and operating-point performance under these conditions.

The simulation models are based on an industrial electrowinning rectifier operating target of:

Parameter	Target
AC input voltage	415 V
DC voltage	7 V
DC current	6000 A
Nominal DC power	approximately 42 kW

Four configurations are compared:

1. Conventional phase-controlled SCR rectifier
2. Unsynchronized open-loop SiC PWM rectifier
3. Synchronized open-loop SiC PWM rectifier
4. Synchronized closed-loop SiC PWM rectifier

Key Results

Metric	SCR	SiC (unsync)	SiC (sync, OL)	SiC (closed-loop)
Vdc (V)	3.7	14.0	17.2	6.79
Idc (A)	1350	680	374	5906
Pdc (W)	≈5,000	≈9,500	≈6,430	≈40,100
THD (%)	28.5	66.6	10.3	8.3
DC Ripple (%)	90.5	186.9	≈200	–

The synchronized closed-loop SiC configuration achieved the lowest AC-side current THD at 8.3%.

It also approached the industrial target operating point:

• DC voltage: 6.79 V, approximately 97% of target
• DC current: 5906 A, approximately 98% of target
• DC power: approximately 40.1 kW
• Nominal target power: 42 kW
• Achieved power: approximately 95.4% of nominal

The results indicate that control strategy is a critical determinant of SiC rectifier performance in this operating regime.

Repository Structure

SiC-Electrowinning-Rectifier/
│
├── docs/
│   ├── methodology.md
│   ├── model_architecture.md
│   └── repository_guide.md
│
├── figures/
│   ├── fig2_scr_model_topology.png
│   ├── fig3_sic_model_topology.png
│   ├── fig4_scr_Vdc_Idc_waveform.png
│   ├── fig5_sic_Vdc_Idc_waveform.png
│   ├── fig7_scr_harmonics.png
│   ├── fig8_sic_harmonics.png
│   ├── fig9_comparison_summary.png
│   ├── fig_full_comparison.png
│   ├── fig_sic_closedloop_harmonics.png
│   ├── fig_sic_closedloop_model.png
│   ├── fig_sic_sync_harmonics.png
│   └── sic_closedloop_waveform.png
│
├── models/
│   ├── scr_rectifier_model.slx
│   └── sic_rectifier_model.slx
│
├── paper/
│
├── results/
│   └── summary.md
│
└── .gitignore