Skip to content
View Amit-Mahato54322's full-sized avatar

Highlights

  • Pro

Block or report Amit-Mahato54322

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. TxstAssistant TxstAssistant Public

    Python

  2. buildingAnIntegerALU buildingAnIntegerALU Public

    Digital logic design project using Verilog for a Computer Architecture course. Implements 1-bit NOT, NAND, and NOR gates, along with a 4-bit arithmetic right shift circuit with sign-extension. Incl…

    Verilog

  3. ai-account-brief-generator ai-account-brief-generator Public

    Python

  4. computing-systems-fundamentals computing-systems-fundamentals Public

    Python

  5. bkim3879/HackTX2025 bkim3879/HackTX2025 Public

    TypeScript