A complete implementation of the SAP-1 (Simple-As-Possible Computer) architecture designed using Logisim and physically implemented on breadboards with TTL integrated circuits.
This project demonstrates the complete Fetch–Decode–Execute instruction cycle through both simulation and real hardware implementation as part of the Computer Architecture course.
The objective of this project was to design and implement a complete 8-bit SAP-1 educational computer from scratch.
The computer was first built and verified using Logisim, then physically implemented using breadboards and TTL integrated circuits to demonstrate the execution of machine-language programs.
The processor supports loading instructions into RAM, fetching instructions, decoding opcodes, executing arithmetic operations, storing results, and displaying the output on a 7-segment display.
- Complete SAP-1 computer architecture
- Logisim simulation
- Physical hardware implementation
- Fetch–Decode–Execute instruction cycle
- Program Counter (PC)
- Memory Address Register (MAR)
- RAM
- Instruction Register (IR)
- Controller / Control Unit
- Arithmetic Logic Unit (ALU)
- Register A
- Register B
- Output Register
- Decoder
- 7-Segment Display
- Clock and Reset circuits
- Sample machine-language program
- Logisim
- Digital Logic
- Computer Architecture
- Breadboards
- TTL Integrated Circuits
- Combinational Logic
- Sequential Logic
SAP1-Educational-Computer/
├── hardware/
├── logisim/
├── programs/
├── screenshots/
├── README.md
├── LICENSE
└── .gitignore
The complete SAP-1 computer was first designed and verified using Logisim.
The simulation demonstrates the complete execution cycle including instruction fetching, decoding, arithmetic operations, memory access, and output generation.
After validating the design in Logisim, the SAP-1 computer was physically implemented using breadboards and TTL integrated circuits.
The hardware successfully reproduces the same instruction execution process performed in the simulator.
A sample machine-language program is included inside:
programs/sap1program.txt
The instructions can be loaded directly into RAM before running the simulation or testing the physical implementation.
The provided program demonstrates instruction execution through the complete Fetch–Decode–Execute cycle.
- Open the Logisim circuit located inside the logisim folder.
- Load the instructions from programs/sap1program.txt into RAM.
- Reset the processor.
- Enable the clock.
- Execute the program step-by-step or continuously.
- Observe the register values and output display.
- Power the breadboard implementation.
- Load the same machine instructions.
- Reset the processor.
- Start the clock.
- Observe LEDs, registers, and the seven-segment display.
Computer Architecture
SAP-1 Educational Computer
Zewail City of Science and Technology
This project was developed as part of the Computer Architecture course at Zewail City of Science and Technology.
Course: Computer Architecture
Project: SAP-1 Educational Computer
This project is intended for educational purposes only.