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Cherry-pick PR #24: Fix pad_len issue for t2v and ti2v sp case#25

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Wei-Lin-Intel with Copilot wants to merge 48 commits into
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Cherry-pick PR #24: Fix pad_len issue for t2v and ti2v sp case#25
Wei-Lin-Intel with Copilot wants to merge 48 commits into
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copilot/add-hpu-fp8-linear-gemm-support-again

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Copilot AI commented May 13, 2026

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Summary

Cherry-picks the changes from PR #24 to the copilot/add-hpu-fp8-linear-gemm-support branch.

Changes

This cherry-picks commit 7453f71 which fixes the pad_len issue for t2v and ti2v sequence parallel cases. The original pad_len was added in commit edf8b3d for s2v support, but it broke the SP case for t2v and ti2v. This patch fixes the issue.

Original PR

mengker33 and others added 30 commits May 13, 2026 05:56
Replace some cuda specific ops to hpu;
Apply FusedSDPA;
Modify rope to fit hpu because hpu does not support complex type;
Add mark_step to reduce graph compile time.

Co-authored-by: Jincheng Miao <jincheng.miao@intel.com>

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
* S2V functional ready on gaudi

* Improve rope performance

* Remove float() to avoid fav3 issue


Signed-off-by: Chen, Wenbin <wenbin.chen@intel.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Apply FAV3 in sp attention;
Modify rope for sp case.

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Signed-off-by: Jincheng Miao <jincheng.miao@intel.com>

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Signed-off-by: Chen, Wenbin <wenbin.chen@intel.com>

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Signed-off-by: Chen, Wenbin <wenbin.chen@intel.com>

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Signed-off-by: Chen, Wenbin <wenbin.chen@intel.com>

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Signed-off-by: Chen, Wenbin <wenbin.chen@intel.com>

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Signed-off-by: Chen, Wenbin <wenbin.chen@intel.com>

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
1. Ensure rms norm calculation is under float32;
2. Add several mark_step to align tensor values between sp and non-sp case;

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
This patch includes two fix:
1. Move data to cpu for torch.linalg.qr as hpu generates sign-opposite
   result which causes incorrect face motion;
2. Use fp32 for motion feat matmul.

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
mengker33 and others added 18 commits May 13, 2026 05:56
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
1. Add pad to cos/sin when there is padding;
2. Add the second padding to ensure the seq len is divisible by both
sp_size and T dim;
3. Pass pad_len to fav3 in sp case.

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
In face encoder, seq_len will be divided by T dim, so we need to
remove sp padding to make seq_len divisible by T, then after face
attention, we add sp padding back to attn output.

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
- Add wan/utils/fp8_linear.py with WanFP8Linear, dynamic_quant,
  apply_fp8_linear_hpu, and wrap_blocks_linear_fp8 utilities
- Add --fp8 CLI flag to generate.py
- Update WanI2V, WanT2V, WanTI2V, WanS2V __init__ and _configure_model
  to accept fp8 parameter and wrap blocks Linear layers at init time

Agent-Logs-Url: https://github.com/wenbinc-Bin/Wan2.2/sessions/eadb65ce-e852-465b-a87e-f8dc391a1df7

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
In commit edf8b3d, pad_len is added for s2v, but it breaks the sp case
for t2v and ti2v, this patch will fix the issue.

Co-authored-by: Wei-Lin-Intel <63534993+Wei-Lin-Intel@users.noreply.github.com>
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5 participants