High-pass filter implementation of the Pan-Tompkins algorithm based on explicit difference equations, optimized for hardware-friendly design and validated in MATLAB using coefficient-based filtering for baseline wander removal in ECG signals.
Hardware-based 3-layer SNN prototype (3-2-1 architecture) using discrete 74LS series logic. Features event-driven temporal pattern recognition via 74LS161 integration and 74LS85 thresholding. Validated at 10kHz with asynchronous RC reset loops to mimic biological refractory periods. Developed as a standalone hardware neural inference engine.
Low-pass filter implementation of the Pan-Tompkins algorithm using explicit recursive coefficients, designed for MATLAB validation and direct translation to VHDL, aiming at noise reduction and QRS enhancement in ECG signals.
To associate your repository with the vlsi-architecture topic, visit your repo's landing page and select "manage topics."