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pyltspice
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Inverter Chain (Buffer) Analysis and Optimization using LTspice and Python.
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Updated
Mar 26, 2024 - Python
Design, simulation(LTspice), and automated Python characterization of a Two-Stage Miller-Compensated CMOS Op-Amp in TSMC 0.18µm. Achieved 71 dB Gain, 52.1 MHz GBW, 63.3° Phase Margin, and 53.7 V/µs Slew Rate with deep-submicron short-channel tuning.
python op-amp transient-analysis cmos integrated-circuits analog-ic-design ltspice mosfet analog-electronics opamp electronic-design-automation vlsi-design phase-margin differential-amplifier operational-amplifier two-stage-opamp-design pyltspice tsmc-180nm miller-compensation frequency-compensation
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Aug 17, 2026 - Python
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