feat(lance-linalg): runtime SIMD dispatch for pre-Haswell x86_64 from-source builds

[tobocop2]

Adds runtime SIMD dispatch to lance-linalg's hot distance kernels so a from-source build with a lower x86_64 baseline produces a working binary on pre-Haswell hardware (Sandy Bridge / Ivy Bridge / Steamroller). fast-by-default with a documented from-source override for legacy users.

Today, import lancedb SIGILLs on AVX-without-AVX2 CPUs because the wheel bakes AVX2 into every compiled function with no runtime guard. numpy and pyarrow handle the same hardware via runtime dispatch. This PR brings lance to parity for the from-source legacy build path.

Summary

• 5-tier runtime SIMD dispatch (scalar / AVX / AVX+FMA / AVX2+FMA / AVX-512) on all 10 hot f32/f64 distance kernels in lance-linalg, using the same match *SIMD_SUPPORT + mod x86 { #[target_feature(enable=...)] pub unsafe fn ... } shape as dot_u8.rs / cosine_u8.rs / l2_u8.rs. On the haswell baseline, dispatch always lands on AVX2 — modern compile output is unchanged from today.
• lance.simd_info() Python API mirroring pyarrow.runtime_info() for tier introspection.
• qemu-pre-haswell CI gate that builds with RUSTFLAGS="-C target-cpu=x86-64-v2" (env-var-scoped to that one job — workspace .cargo/config.toml is unchanged) and runs lance-linalg tests under qemu Nehalem.
• CONTRIBUTING.md documents the legacy build: RUSTFLAGS="-C target-cpu=x86-64-v2" cargo build --release.

Zero new external dependencies. Dispatch shape extends an idiom lance already uses for u8 and f16/bf16 kernels rather than introducing a new convention. Recent precedent: @justinrmiller's #6540, #6517, #6506, #6510.

Verification

• cargo test -p lance-linalg --lib — 83/83 on aarch64 dev box.
• 38 new proptest cases verifying scalar↔SIMD bit-for-bit equivalence per tier per kernel; gated on is_x86_feature_detected!() so each runs on hosts that can execute its tier.
• cargo clippy --all-targets -- -D warnings clean; cargo fmt --check clean; Cargo.lock unchanged.
• SIGILL gone on Sandy Bridge Xeon E5-2609 with the documented RUSTFLAGS override (via companion lancedb wheel — see tobocop2/lancedb#2 for the verification PASS output).
• Modern-hardware bench delta still pending. The AVX2 path is preserved as one of the per-tier kernels and the workspace baseline still bakes AVX2 into surrounding code, so by construction the modern compile is unchanged — but I'll confirm with criterion change: lines once I find a host that can hold the full cargo bench -p lance-linalg --bench {cosine,dot,l2,norm_l2} suite (Codespace's 30-min idle timeout killed my last attempt mid-run).

Closes #1.