GitHub - terman/bhiv: Soft mulitcore

Name		Name	Last commit message	Last commit date
Latest commit History 3 Commits
Tests		Tests
Makefile		Makefile
README		README
bhiv.prj		bhiv.prj
bhiv.v		bhiv.v
bhiv.xst		bhiv.xst
bhiv_sim.v		bhiv_sim.v
bhivmem.py		bhivmem.py
bram.v		bram.v
cache.v		cache.v
core.v		core.v
fifo.v		fifo.v
ring.h		ring.h
ring.v		ring.v
risc.h		risc.h
risc.v		risc.v
simulate.do		simulate.do

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bhiv* -- Verilog and low-level software for a minimalist soft multicore

*Inspired by Chuck Thacker's Beehive project

Soft mulitcore

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