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simosilias/README.md

Hi, I'm Ilias 👋

I'm an Electrical & Computer Engineering student at Aristotle University of Thessaloniki (AUTH), interested in digital & analog hardware design & embedded systems.

🔧 Skills & Tools

C Verilog SystemVerilog Cadence Virtuoso STM32 Git Linux

📌 Featured Projects

Project Description Stack
⚡ Verilog NN Accelerator 3-neuron neural network AI accelerator with ALU, register file & FSM Verilog
🔌 Two-Stage Op-Amp Miller-compensated nMOS op-amp with PVT & Monte Carlo analysis Cadence Virtuoso
🐚 TinyShell Unix shell with pipelines, redirections & job control C

📫 Contact

Feel free to reach out via GitHub!

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  1. Verilog-nn-accelerator Verilog-nn-accelerator Public

    A 32-bit ALU, calculator and 3-neuron neural network AI accelerator, implemented in Verilog. Assignment for the Digital HW systems 1 course at Aristotle University of Thessaloniki (AUTh)

    Verilog

  2. two-stage-nmos-opamp two-stage-nmos-opamp Public

    A two-stage Miller-compensated nMOS op-amp designed in Cadence Virtuoso. Assignment for the Electronics III course at Aristotle University of Thessaloniki (AUTh).

  3. TinyShell TinyShell Public

    A basic Unix shell with pipelines, redirections and job control, written in C. It is an assignment for the Operating Systems course at Aristotle University of Thessaloniki (AUTh).

    C