Keep the default RISC-V build on the SISD fallback path

[carlosqwqqwq]

Why

spoa already has a non-SIMD fallback path in AlignmentEngine::Create(...): if the SIMD backend cannot be created, it falls back to SisdAlignmentEngine::Create(...).

The problem is that the default CMake path could still inject x86-oriented optimization flags such as -march=native or -msse4.1. When a build is configured for riscv64, those host-oriented flags do not represent the declared target and make the default build configuration misleading.

This patch makes the existing conservative RISC-V path explicit: riscv64 stays on the current SISD fallback unless SIMDe is intentionally enabled for porting work.

What changed

• Updated CMakeLists.txt:
  • detect riscv* from CMAKE_SYSTEM_PROCESSOR;
  • skip the default x86-specific optimization flags on RISC-V targets when x86 dispatch generation is not enabled;
  • emit a status message that the default RISC-V build uses the SISD fallback unless SIMDe is enabled.
• Updated README.md:
  • document that the default riscv64 CMake build skips x86-specific optimization flags and uses the SISD fallback path.

Verification

• Verified native library configure/build:
  • cmake -S . -B build-native -G Ninja -DCMAKE_BUILD_TYPE=Release -Dspoa_build_exe=OFF -Dspoa_build_tests=OFF
  • cmake --build build-native --parallel 4
• Verified simulated riscv64 configure/build:
  • cmake -S . -B build-riscv-sim -G Ninja -DCMAKE_BUILD_TYPE=Release -Dspoa_build_exe=OFF -Dspoa_build_tests=OFF -DCMAKE_SYSTEM_NAME=Linux -DCMAKE_SYSTEM_PROCESSOR=riscv64 -DCMAKE_TRY_COMPILE_TARGET_TYPE=STATIC_LIBRARY
  • cmake --build build-riscv-sim --parallel 4
• Confirmed the simulated riscv64 configuration now prints:
  • RISC-V target detected; spoa will use the SISD fallback unless SIMDe is enabled
  • Skipping x86-specific optimization flags for RISC-V target
• Confirmed build-riscv-sim/build.ninja:
  • still builds the generic library sources plus simd_alignment_engine_dispatcher.cpp;
  • does not contain -march=native, -msse4.1, cpu_features, spoa_avx2, spoa_sse4.1, or spoa_sse2.
• Verified a real riscv64 install + consumer flow in dockcross/linux-riscv64:20260515-5fd14ac:
  • configured and built the static library with -DCMAKE_SYSTEM_NAME=Linux -DCMAKE_SYSTEM_PROCESSOR=riscv64 and the real /usr/xcc/riscv64-unknown-linux-gnu/bin/riscv64-unknown-linux-gnu-g++ toolchain;
  • installed spoa to a temporary prefix and built a minimal spoa::spoa consumer against the installed package config;
  • confirmed the consumer binary with file and readelf -h, which reported a real RISC-V ELF (Machine: RISC-V);
  • confirmed the real build artifacts still do not inject -march=native, -msse4.1, cpu_features, spoa_avx2, spoa_sse4.1, or spoa_sse2;
  • ran the consumer with qemu-riscv64, which printed spoa-ok consensus_len=86 prefix=CATAAAAGAACGTAGGTCGCCTGT.

Notes

• This is a conservative portability patch. It does not add RVV intrinsics or a dedicated RISC-V SIMD backend.
• The goal is to make the existing SISD fallback explicit, target-correct, and verifiable for riscv64.