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Minor bug fix in compressed immediate decoding - #74

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mahendraVamshi wants to merge 16 commits into
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Minor bug fix in compressed immediate decoding#74
mahendraVamshi wants to merge 16 commits into
riscvarchive:devfrom
mahendraVamshi:master

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@mahendraVamshi

@mahendraVamshi mahendraVamshi commented Jul 31, 2023

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[0.18.1] - 2023-07-31

  • Minor fix to compressed immediate decoding

@mahendraVamshi
Update rvopcodesdecoder.py
dd56d0a 
Signed-off-by: Mahendra Vamshi A <77983822+mahendraVamshi@users.noreply.github.com>
@mahendraVamshi
Bump version: 0.18.0 → 0.18.1
91d0c0b
@mahendraVamshi
minor changes
6a9dea0
@mahendraVamshi

mahendraVamshi commented Jul 31, 2023

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Hi @pawks,
This is a minor bug fix from previous PR #73

@mahendraVamshi
Update rvopcodesdecoder.py
29599e2 
fixed the rs1,rs2,rs3 and rd names for compressed instructions

Signed-off-by: Mahendra Vamshi A <77983822+mahendraVamshi@users.noreply.github.com>
@neelgala

neelgala commented Aug 20, 2023

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@mahendraVamshi can you elaborate more on what corner case this PR fixes ?

@mahendraVamshi

mahendraVamshi commented Aug 21, 2023

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@neelgala
instr: 62510 addr: 0x800014d2 instr_name: c.sdsp rs2: (11, 'x') imm: -24
This instruction uses above immideate field and the above PR fixes the imm field for this instruction
c.sdsp instructuions uses the fixed imm field

@neelgala

neelgala commented Aug 22, 2023

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@mahendraVamshi please change your target branch to dev. Remove all versioning changes in setup* and init.py. Also the changelog entry must be under WIP-DEV section of the CHANGELOG.md file.

mahendraVamshi and others added 11 commits September 21, 2023 06:12
@mahendraVamshi
Revert "Update rvopcodesdecoder.py"
a91da56 
This reverts commit 29599e2.
@mahendraVamshi
Update spike.py
73acdc1 
fixed regex pattern

Signed-off-by: Mahendra Vamshi A <77983822+mahendraVamshi@users.noreply.github.com>
@mahendraVamshi
Update rvopcodesdecoder.py
eaa6404 
Signed-off-by: Mahendra Vamshi A <77983822+mahendraVamshi@users.noreply.github.com>
@mahendraVamshi
Update rvopcodesdecoder.py
3e17fc6 
Signed-off-by: Mahendra Vamshi A <77983822+mahendraVamshi@users.noreply.github.com>
@mahendraVamshi
experiment
b43aacd
@mahendraVamshi
exp
abbe92e
@mahendraVamshi
exp
93a5b4a
@mahendraVamshi
exp
5deaf26
@mahendraVamshi
revert back
e2f8e62
@mahendraVamshi
Update rvopcodesdecoder.py
2b5343e 
Signed-off-by: Mahendra Vamshi A <77983822+mahendraVamshi@users.noreply.github.com>
@mahendraVamshi
Update rvopcodesdecoder.py
d592747 
Signed-off-by: Mahendra Vamshi A <77983822+mahendraVamshi@users.noreply.github.com>
@jamesbeyond
jamesbeyond changed the base branch from master to dev May 28, 2024 17:20
@jamesbeyond

jamesbeyond commented Oct 7, 2024

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Dear @mahendraVamshi

The CTG and ISAC Repo had been moved to riscv-arch-test via PR
riscv/riscv-arch-test#495

If you think this PR is important, and need to me merged on to risc-v CTG or ISAC, please re-submit your PR against riscv-arch-test

This repository shall be archived in about one week time .

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3 participants

@mahendraVamshi @neelgala @jamesbeyond