nor_flash_backend: add native SystemC NOR flash backend for QSPI#77
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tmarcero wants to merge 1 commit into
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nor_flash_backend: add native SystemC NOR flash backend for QSPI#77tmarcero wants to merge 1 commit into
tmarcero wants to merge 1 commit into
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tmarcero
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Alwalid Salama (alwalidsalama),
mahmdkamel and
Mark Burton (markfoodyburton)
Implement new QSPI SystemC model based on Micron Flash (MT25QU256ABA) The model handles the full NOR flash command set (READ, PP4, ERASE, READ_ID, READ_SFDP, status/config registers) via the biflow socket protocol. WEL is managed per-transaction using the last_write_fragment signal driven by the QSPI to support DMA multi-fragment writes. Signed-off-by: Marceron Thomas <tmarcero@qti.qualcomm.com> Signed-off-by: Alwalid Salama <asalama@qti.qualcomm.com>
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Implement new QSPI SystemC model based on Micron Flash (MT25QU256ABA)
The model handles the full NOR flash command set (READ, PP4, ERASE, READ_ID, READ_SFDP, status/config registers) via the biflow socket protocol. WEL is managed per-transaction using the last_write_fragment signal driven by the QSPI to support DMA multi-fragment writes.