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tc_sram: Guard simulation-only random init from synthesis#46

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fix-tc-sram-synth-guard
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tc_sram: Guard simulation-only random init from synthesis#46
imchenwu wants to merge 1 commit into
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fix-tc-sram-synth-guard

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@imchenwu

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#44 moved the random initialization into the random_init_word function, so $urandom is now elaborated by synthesis tools. In AXI, when Bender automatically updates tech_cells_generic to v0.2.14, Synopsys DC fails with VER-110.

This PR moves the init_val declaration out so it stays visible as the SRAM reset value, and guards the function and the init process with pragma translate_off/translate_on. Simulators ignore the pragma, so simulation behavior should be unchanged.

This PR is verified in the AXI CI, with DC elaborating tc_sram cleanly again, and the Questasim simulation passed.

The `random_init_word` function uses `$urandom`, which synthesis tools
cannot elaborate inside a function body (e.g. Synopsys DC fails with
VER-110). Move the `init_val` declaration out so it stays visible as the
SRAM reset value, and guard the function and the init process with
`pragma translate_off`/`translate_on`. Simulators ignore the pragma, so
simulation behavior is unchanged.
@phsauter

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What exactly is the scenario where one would synthesize the generic tc_sram?

@imchenwu

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Sorry for the confusion, it's not actually synthesized. Our DC flow only passes synth_test to bender, so tc_sram.sv remains in the analyze flist and is compiled even though nothing instantiates it in synthesis. Optionally I can also add the asic parameter to Bender so that tc_sram.sv is not included in the analyze flist...

@phsauter

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We would have to test if this works properly (it should) but maybe we could guard a (* blackbox *) attribute with synthesis guards and then whenever someone synthesized something with a tc_sram it just instantiates a blackbox. Would that match your expected behavior?

@imchenwu

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Yes that would be great!

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2 participants