GitHub - pritam-sethuraman/USB-Core

Name		Name	Last commit message	Last commit date
Design		Design
README.txt		README.txt
Report.txt		Report.txt
usb_phy_syn_buggy.vhd		usb_phy_syn_buggy.vhd
usb_syn.vhdl		usb_syn.vhdl

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# Formal Verivifaction of USB IP Function Core

## Synthesis of RTL to Netlist
step_1 : create new directory sysnopsis by using the cmd mkdir synopsys
<br>
step_2 :

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cadence-conformal design-vision equivalence-checker formal-verification formality synopsys vhdl

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