Skip to content

@chiplicity chiplicity

Change the repository type filter

All

    Repositories list

    15 repositories

    • chiplicity.github.io

      Public
      13•1•0•3•Updated May 12, 2023May 12, 2023

    • iic-osic-tools

      Public
      IIC-OSIC-TOOLS is an all-in-one Docker container for SKY130-based analog and digital chip design. It runs on x86_64/amd64 and aarch64/arm64.
      Tcl
      •
      Apache License 2.0
      •179•0•0•0•Updated Dec 8, 2022Dec 8, 2022

    • openfpga

      Public
      Verilog
      •
      Apache License 2.0
      •2•5•0•0•Updated Jul 29, 2021Jul 29, 2021

    • openlane

      Public
      Verilog
      •
      Apache License 2.0
      •0•2•0•0•Updated May 12, 2021May 12, 2021

    • caravel_swerv-el2

      Public
      Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
      Verilog
      •
      Apache License 2.0
      •140•1•0•0•Updated Dec 11, 2020Dec 11, 2020

    • verible

      Public
      Verible provides a SystemVerilog parser, style-linter, and formatter.
      C++
      •
      Apache License 2.0
      •299•0•0•0•Updated Feb 14, 2020Feb 14, 2020

    • sv2v

      Public
      SystemVerilog to Verilog conversion
      Haskell
      •
      Other
      •64•0•0•0•Updated Feb 10, 2020Feb 10, 2020

    • gdshelpers

      Public
      GDSHelpers is an open-source package for automatized pattern generation for nano-structuring.
      Python
      •
      GNU Lesser General Public License v3.0
      •33•0•0•0•Updated Feb 5, 2020Feb 5, 2020

    • Cores-SweRV

      Public
      SweRV EH1 core
      SystemVerilog
      •
      Apache License 2.0
      •241•1•0•0•Updated Dec 12, 2019Dec 12, 2019

    • eda-collection

      Public
      20•0•0•0•Updated Dec 5, 2019Dec 5, 2019

    • hdlConvertor

      Public
      Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTL4
      C++
      •
      MIT License
      •80•0•0•0•Updated Nov 24, 2019Nov 24, 2019

    • swerv_eh1

      Public
      A directory of Western Digital’s RISC-V SweRV Cores
      SystemVerilog
      •
      Apache License 2.0
      •134•1•0•0•Updated Aug 19, 2019Aug 19, 2019

    • qucs-help

      Public
      Qucs-Help documentation
      Python
      •12•0•0•0•Updated Jul 25, 2018Jul 25, 2018

    • gdsCAD

      Public
      A simple but powerful Python package for creating photolithography masks in the GDSII format.
      Python
      •
      GNU General Public License v3.0
      •49•0•0•0•Updated Jul 24, 2018Jul 24, 2018

    • documents

      Public
      0•1•0•0•Updated Jan 17, 2018Jan 17, 2018
    ProTip! When viewing an organization's repositories, you can use the props. filter to filter by custom property.