Fixed transformations bugs, upgrade packages, and more.

.github/workflows/builds.yml

@@ -19,8 +19,6 @@ jobs:
     name: Windows Build
     runs-on: windows-latest
     timeout-minutes: 15
-    env:
-      NUGET_ENABLE_LEGACY_CSPROJ_PACK: true
     steps:
       - name: Set net10.0
         uses: actions/setup-dotnet@v5
@@ -62,10 +60,8 @@ jobs:
         run: nuget pack Source\Mosa.Packages\Mosa.Platform.x86.nuspec -OutputDirectory bin\nupkg -Version ${{ env.BUILD_VERSION }}
       - name: Create Package - Mosa.DeviceSystem
         run: nuget pack Source\Mosa.Packages\Mosa.DeviceSystem.nuspec -OutputDirectory bin\nupkg -Version ${{ env.BUILD_VERSION }}
-      - name: Build Project - Mosa.Templates
-        run: dotnet build Source\Mosa.Templates\Mosa.Templates.csproj
       - name: Create Package - Mosa.Templates
-        run: nuget pack Source\Mosa.Templates\Mosa.Templates.csproj -Tool -OutputDirectory bin\nupkg -Version ${{ env.BUILD_VERSION }}
+        run: dotnet pack Source\Mosa.Templates\Mosa.Templates.csproj -o bin\nupkg /p:Version=${{ env.BUILD_VERSION }}
       - name: Store Nuget Packages Artifact
         uses: actions/upload-artifact@v6
         with:
@@ -89,8 +85,6 @@ jobs:
     runs-on: windows-latest
     timeout-minutes: 15
     if: github.event_name == 'push' && github.repository == 'mosa/MOSA-Project' && github.ref == 'refs/heads/master'
-    env:
-      NUGET_ENABLE_LEGACY_CSPROJ_PACK: true
     steps:
       - name: Set net10.0
         uses: actions/setup-dotnet@v5

Source/Data/IR-Optimizations-Useless.json

@@ -39,7 +39,7 @@
 			"SubName": "Double",
 			"Expression": "IR.ZeroExtend8x32 (IR.ZeroExtend8x32 a)",
 			"Filter": "!IsConstant(a)",
-			"Result": "(IR.Move32 a)",
+			"Result": "(IR.ZeroExtend8x32 a)",
 			"Priority": "85",
 			"Variations": "No"
 		},
@@ -49,7 +49,7 @@
 			"SubName": "Double",
 			"Expression": "IR.ZeroExtend16x32 (IR.ZeroExtend16x32 a)",
 			"Filter": "!IsConstant(a)",
-			"Result": "(IR.Move32 a)",
+			"Result": "(IR.ZeroExtend16x32 a)",
 			"Priority": "85",
 			"Variations": "No"
 		},
@@ -59,7 +59,7 @@
 			"SubName": "Double",
 			"Expression": "IR.ZeroExtend8x64 (IR.ZeroExtend8x64 a)",
 			"Filter": "!IsConstant(a)",
-			"Result": "(IR.Move64 a)",
+			"Result": "(IR.ZeroExtend8x64 a)",
 			"Priority": "85",
 			"Variations": "No"
 		},
@@ -69,7 +69,7 @@
 			"SubName": "Double",
 			"Expression": "IR.ZeroExtend16x64 (IR.ZeroExtend16x64 a)",
 			"Filter": "!IsConstant(a)",
-			"Result": "(IR.Move64 a)",
+			"Result": "(IR.ZeroExtend16x64 a)",
 			"Priority": "85",
 			"Variations": "No"
 		},
@@ -79,7 +79,7 @@
 			"SubName": "Double",
 			"Expression": "IR.ZeroExtend32x64 (IR.ZeroExtend32x64 a)",
 			"Filter": "!IsConstant(a)",
-			"Result": "(IR.Move64 a)",
+			"Result": "(IR.ZeroExtend32x64 a)",
 			"Priority": "85",
 			"Variations": "No"
 		},
@@ -89,7 +89,7 @@
 			"SubName": "Double",
 			"Expression": "IR.SignExtend8x32 (IR.SignExtend8x32 a)",
 			"Filter": "!IsConstant(a)",
-			"Result": "(IR.Move32 a)",
+			"Result": "(IR.SignExtend8x32 a)",
 			"Priority": "85",
 			"Variations": "No"
 		},
@@ -99,7 +99,7 @@
 			"SubName": "Double",
 			"Expression": "IR.SignExtend16x32 (IR.SignExtend16x32 a)",
 			"Filter": "!IsConstant(a)",
-			"Result": "(IR.Move32 a)",
+			"Result": "(IR.SignExtend16x32 a)",
 			"Priority": "85",
 			"Variations": "No"
 		},
@@ -109,7 +109,7 @@
 			"SubName": "Double",
 			"Expression": "IR.SignExtend8x64 (IR.SignExtend8x64 a)",
 			"Filter": "!IsConstant(a)",
-			"Result": "(IR.Move64 a)",
+			"Result": "(IR.SignExtend8x64 a)",
 			"Priority": "85",
 			"Variations": "No"
 		},
@@ -119,7 +119,7 @@
 			"SubName": "Double",
 			"Expression": "IR.SignExtend16x64 (IR.SignExtend16x64 a)",
 			"Filter": "!IsConstant(a)",
-			"Result": "(IR.Move64 a)",
+			"Result": "(IR.SignExtend16x64 a)",
 			"Priority": "85",
 			"Variations": "No"
 		},
@@ -129,7 +129,7 @@
 			"SubName": "Double",
 			"Expression": "IR.SignExtend32x64 (IR.SignExtend32x64 a)",
 			"Filter": "!IsConstant(a)",
-			"Result": "(IR.Move64 a)",
+			"Result": "(IR.SignExtend32x64 a)",
 			"Priority": "85",
 			"Variations": "No"
 		},

Source/Docs/command-line-arguments.rst

@@ -24,14 +24,16 @@ Below are the command line arguments available:
     {none},Compiler.SourceFiles,{value}
     -o,Compiler.OutputFile,{value}
 
+    -path,SearchPaths,{list}
+    -postfix,FilePostfix,{value}
+
     -threading,Compiler.Multithreading,true
     -threading-off,Compiler.Multithreading,false
     -threads,Compiler.Multithreading.MaxThreads,{value}
 
     -base,Compiler.BaseAddress,{value}
     -scanner,Compiler.MethodScanner,true
     -no-code,Compiler.Binary,false
-    -path,SearchPaths,{list}
 
     -inline,Optimizations.Inline,true
     -inline-off,Optimizations.Inline,false
@@ -206,7 +208,7 @@ Below are the command line arguments available:
 	-bisect-pairwise-off,UnitTest.Bisector.Pairwise,false
 	-bisect-disabled-file,UnitTest.Bisector.DisabledTransformsFile,{value}
 	-bisect-state,UnitTest.Bisector.StateFile,{value}
-	-bisect-plan,UnitTest.Bisector.Plan,{value} (disable-one|enable-one|random-combo|failure-inducing|masking)
+	-bisect-plan,UnitTest.Bisector.Plan,{value} (disable-one|enable-one|random|failure-inducing|masking)
 	-bisect-order,UnitTest.Bisector.Order,{value}
 	-bisect-iterations,UnitTest.Bisector.Iterations,{value}
 	-bisect-seed,UnitTest.Bisector.RandomSeed,{value}

Source/Docs/settings-options.rst

@@ -255,6 +255,7 @@ Common Settings
    :widths: 50, 200
 
     DefaultFolder,Default folder for output files
+    FilePostfix,Postfix string appended to output file names
     SearchPaths,Folder to search for files
     TemporaryFolder,Specifies a temporary folder
 
@@ -275,9 +276,9 @@ Unit Test Settings
 	UnitTest.Bisector.Pairwise,"If true, enables pairwise bisector analysis mode"
 	UnitTest.Bisector.DisabledTransformsFile,Path to a text file listing transform names to force-disable (one per line) during bisector runs
 	UnitTest.Bisector.StateFile,Path to the bisector state file used to resume interrupted runs
-	UnitTest.Bisector.Plan,"Bisector plan: disable-one, enable-one, random-combo, failure-inducing, or masking"
+	UnitTest.Bisector.Plan,"Bisector plan: disable-one, enable-one, random, failure-inducing, or masking"
 	UnitTest.Bisector.Order,"Iteration order for bisector plans: original, count, or random"
-	UnitTest.Bisector.Iterations,Number of random-combo iterations to execute per run
+	UnitTest.Bisector.Iterations,Number of random iterations to execute per run
 	UnitTest.Bisector.RandomSeed,Optional random seed for deterministic random ordering/combinations (0 = auto)
 	UnitTest.Bisector.ResetState,"If true, deletes existing state before starting"
 	UnitTest.Bisector.WorkerIteration,"If true, executes only one bisector iteration per process run"

Source/Docs/unit-tests.rst

@@ -43,7 +43,7 @@ Supported plans:
 
 - ``-bisect-plan disable-one``: disable one transform at a time
 - ``-bisect-plan enable-one``: enable one transform at a time
-- ``-bisect-plan random-combo``: randomly enable/disable all transforms each iteration (resumable)
+- ``-bisect-plan random``: randomly enable/disable all transforms each iteration (resumable)
 - ``-bisect-plan failure-inducing``: bisect to identify transforms that induce failing runs
 - ``-bisect-plan masking``: bisect to identify transforms whose removal induces failures
 
@@ -73,7 +73,7 @@ Optional ordering for deterministic plans:
 - ``-bisect-order count``: prioritize lower-observed transforms first
 - ``-bisect-order random``: randomized order (seeded via ``-bisect-seed``)
 
-For ``random-combo``, use ``-bisect-iterations <N>`` (default 20) to control how many iterations are run per invocation.
+For ``random``, use ``-bisect-iterations <N>`` (default 20) to control how many iterations are run per invocation.
 
 Supervisor
 ----------

Source/Mosa.Compiler.Framework/Analysis/SparseConditionalConstantPropagation.cs

@@ -945,15 +945,20 @@ private static bool IntegerOperation1(BaseInstruction instruction, ulong operand
 	{
 		if (instruction == IR.Neg32)
 		{
-			result = (uint)-((int)operand1);
+			result = (ulong)(uint)-((int)operand1);
 			return true;
 		}
 		else if (instruction == IR.Neg64)
 		{
 			result = (ulong)-((long)operand1);
 			return true;
 		}
-		else if (instruction == IR.Not32 || instruction == IR.Not64)
+		else if (instruction == IR.Not32)
+		{
+			result = (ulong)(uint)~operand1;
+			return true;
+		}
+		else if (instruction == IR.Not64)
 		{
 			result = ~operand1;
 			return true;
@@ -1021,59 +1026,104 @@ private void IntegerOperation2(Node node)
 
 	private static bool IntegerOperation(BaseInstruction instruction, ulong operand1, ulong operand2, ConditionCode conditionCode, out ulong result)
 	{
-		if (instruction == IR.Add32
-			|| instruction == IR.Add64)
+		if (instruction == IR.Add32)
+		{
+			result = (ulong)(uint)(operand1 + operand2);
+			return true;
+		}
+		else if (instruction == IR.Add64)
 		{
 			result = operand1 + operand2;
 			return true;
 		}
-		else if (instruction == IR.Sub32
-				 || instruction == IR.Sub64)
+		else if (instruction == IR.Sub32)
+		{
+			result = (ulong)(uint)(operand1 - operand2);
+			return true;
+		}
+		else if (instruction == IR.Sub64)
 		{
 			result = operand1 - operand2;
 			return true;
 		}
-		else if (instruction == IR.MulUnsigned32
-				 || instruction == IR.MulSigned32
-				 || instruction == IR.MulUnsigned64
-				 || instruction == IR.MulSigned64)
+		else if (instruction == IR.MulUnsigned32 || instruction == IR.MulSigned32)
+		{
+			result = (ulong)(uint)(operand1 * operand2);
+			return true;
+		}
+		else if (instruction == IR.MulUnsigned64 || instruction == IR.MulSigned64)
 		{
 			result = operand1 * operand2;
 			return true;
 		}
-		else if ((instruction == IR.DivUnsigned32 || instruction == IR.DivUnsigned64) && operand2 != 0)
+		else if (instruction == IR.DivUnsigned32 && operand2 != 0)
+		{
+			result = (ulong)((uint)operand1 / (uint)operand2);
+			return true;
+		}
+		else if (instruction == IR.DivUnsigned64 && operand2 != 0)
 		{
 			result = operand1 / operand2;
 			return true;
 		}
-		else if ((instruction == IR.DivSigned32 || instruction == IR.DivSigned64) && operand2 != 0)
+		else if (instruction == IR.DivSigned32 && operand2 != 0)
+		{
+			result = (ulong)(uint)((int)operand1 / (int)operand2);
+			return true;
+		}
+		else if (instruction == IR.DivSigned64 && operand2 != 0)
 		{
 			result = (ulong)((long)operand1 / (long)operand2);
 			return true;
 		}
-		else if ((instruction == IR.RemUnsigned32 || instruction == IR.RemUnsigned64) && operand2 != 0)
+		else if (instruction == IR.RemUnsigned32 && operand2 != 0)
+		{
+			result = (ulong)((uint)operand1 % (uint)operand2);
+			return true;
+		}
+		else if (instruction == IR.RemUnsigned64 && operand2 != 0)
 		{
 			result = operand1 % operand2;
 			return true;
 		}
-		else if ((instruction == IR.RemSigned32 || instruction == IR.RemSigned64) && operand2 != 0)
+		else if (instruction == IR.RemSigned32 && operand2 != 0)
+		{
+			result = (ulong)(uint)((int)operand1 % (int)operand2);
+			return true;
+		}
+		else if (instruction == IR.RemSigned64 && operand2 != 0)
 		{
 			result = (ulong)((long)operand1 % (long)operand2);
 			return true;
 		}
-		else if (instruction == IR.ArithShiftRight32 || instruction == IR.ArithShiftRight64)
+		else if (instruction == IR.ArithShiftRight32)
+		{
+			result = (ulong)(uint)((int)operand1 >> ((int)operand2 & 31));
+			return true;
+		}
+		else if (instruction == IR.ArithShiftRight64)
+		{
+			result = (ulong)((long)operand1 >> ((int)operand2 & 63));
+			return true;
+		}
+		else if (instruction == IR.ShiftRight32)
+		{
+			result = (ulong)((uint)operand1 >> ((int)operand2 & 31));
+			return true;
+		}
+		else if (instruction == IR.ShiftRight64)
 		{
-			result = (ulong)((long)operand1 >> (int)operand2);
+			result = operand1 >> ((int)operand2 & 63);
 			return true;
 		}
-		else if (instruction == IR.ShiftRight32 || instruction == IR.ShiftRight64)
+		else if (instruction == IR.ShiftLeft32)
 		{
-			result = operand1 >> (int)operand2;
+			result = (ulong)(uint)((uint)operand1 << ((int)operand2 & 31));
 			return true;
 		}
-		else if (instruction == IR.ShiftLeft32 || instruction == IR.ShiftLeft64)
+		else if (instruction == IR.ShiftLeft64)
 		{
-			result = operand1 << (int)operand2;
+			result = operand1 << ((int)operand2 & 63);
 			return true;
 		}
 		else if (instruction == IR.Compare32x32)

Source/Mosa.Compiler.Framework/Stages/BaseTransformStage.cs

@@ -46,19 +46,17 @@
 		TransformCountStage = $"{Name}.Transforms";
 		OptimizationCountStage = $"{Name}.Optimizations";
 
-		foreach (var list in transforms)
+		if (AllowTransformHooks)
 		{
-			if (list == null)
-				continue;
+			foreach (var list in transforms)
+			{
+				if (list == null)
+					continue;
 
-			if (AllowTransformHooks)
 				foreach (var transform in list)
 					Compiler.CompilerHooks.RegisterTransform?.Invoke(Name, transform.Name);
+			}
 		}
-
-		if (AllowTransformHooks)
-			foreach (var transform in blockTransforms)
-				Compiler.CompilerHooks.RegisterTransform?.Invoke(Name, transform.Name);
 	}
 
 	protected override void Finish()
@@ -143,7 +141,7 @@
 		SortedByPriority = true;
 	}
 
 	protected virtual void Setup()
 	{
 	}
 
@@ -286,12 +284,6 @@
 
 		foreach (var transform in blockTransforms)
 		{
-			if (AllowTransformHooks)
-			{
-				if (Compiler.CompilerHooks.IsTransformDisabled?.Invoke(Name, transform.Name) == true)
-					continue;
-			}
-
 			var count = transform.Process(Transform);
 
 			var updated = count != 0;

Source/Mosa.Compiler.Framework/Transforms/Optimizations/Auto/Useless/SignExtend16x32Double.cs

@@ -35,6 +35,6 @@ public override void Transform(Context context, Transform transform)
 
 		var t1 = context.Operand1.Definitions[0].Operand1;
 
-		context.SetInstruction(IR.Move32, result, t1);
+		context.SetInstruction(IR.SignExtend16x32, result, t1);
 	}
 }

Source/Mosa.Compiler.Framework/Transforms/Optimizations/Auto/Useless/SignExtend16x64Double.cs

@@ -35,6 +35,6 @@ public override void Transform(Context context, Transform transform)
 
 		var t1 = context.Operand1.Definitions[0].Operand1;
 
-		context.SetInstruction(IR.Move64, result, t1);
+		context.SetInstruction(IR.SignExtend16x64, result, t1);
 	}
 }

Source/Mosa.Compiler.Framework/Transforms/Optimizations/Auto/Useless/SignExtend32x64Double.cs

@@ -35,6 +35,6 @@ public override void Transform(Context context, Transform transform)
 
 		var t1 = context.Operand1.Definitions[0].Operand1;
 
-		context.SetInstruction(IR.Move64, result, t1);
+		context.SetInstruction(IR.SignExtend32x64, result, t1);
 	}
 }