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To achieve the targeted 2x+ speedup over baseline SIMD for multi-vector distances, the memory layout must be specifically optimized to feed the microkernels efficiently. This tracking issue reflects the integration of BlockTransposed, a new Repr implementation that stores multi-vectors in a layout optimized for SIMD processing. This enables faster multi-vector distance computations by ensuring data is arranged for efficient vectorized access patterns.
Tasks
Implement the core block-transposed matrix representation to enable contiguous memory loads into SIMD registers.
Create access abstractions (row proxies and block views) to allow microkernels to seamlessly consume the transposed data.
Validate layout correctness and memory safety across various packing configurations and data types.
Activity