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Add support for reading L1/L2 cache sizes for different platforms(Windows, Linux, MacOS) for our efficient cache aware multi-vector distance functions. #1062
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We might be able to take some reference from - https://github.com/ciresnave/hardware-query/blob/main/src/cpu.rs
We have the type TileBudget type which we need to wire by reading cache sizes from the machine.
Think more on how we can do minimal system calls and reuse the cache sizes across all distance computations.
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[-]Add support for reading L1/L2 cache sizes for our efficient cache aware multi-vector distance functions.[/-][+]Add support for reading L1/L2 cache sizes for different platforms(Windows, Linux, MacOS) for our efficient cache aware multi-vector distance functions.[/+][diskann-quantization] Add CPU cache size detection for multi-vector …
[diskann-quantization] Add CPU cache size detection for multi-vector …