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PolarFire® SoC Motor Control Kit Demo

Introduction

This repository contains the design files needed to create the Libero Project, prebuilt Libero Programming Job file used to program the board and run the PolarFire SoC Motor Control Demo.

This solution is built around custom Motor Control IP cores implementing sensorless Field-Oriented Control (FOC) for BLDC motors. The BLDC Axis IP provides Clarke/Park transforms, time-shared PI controllers for Id/Iq current loops and speed control, PLL-based rotor position estimation, and Space Vector PWM generation with configurable dead-time.

In conjunction, the Rate Limiter IP enables smooth acceleration and deceleration profiles, while the ADC Scaling IP provides real-time phase current measurement with automatic offset calibration and overcurrent fault detection.

This application note demonstrates how these capabilities can be evaluated and integrated using the PolarFire SoC MPFS095T Motor Control Kit platform.

Table of Contents

Demo Design

This demo integrates sensorless Field-Oriented Control (FOC) functionality on the PolarFire SoC Motor Control Kit. The FOC algorithm is demonstrated through real-time BLDC motor speed and torque control via a web-based dashboard interface.

The MSS runs Linux and hosts a Bokeh-based web server that provides the motor control dashboard. User commands for speed, direction, and PI tuning are transmitted to the FPGA fabric via the FIC_0 AXI4 interface. The fabric implements the complete FOC algorithm including Clarke/Park transforms, time-shared PI controllers, PLL-based rotor position estimation, and Space Vector PWM generation.

Real-time phase current measurement is performed by external ADS7952 ADCs, with the ADC Scaling IP providing automatic offset calibration and overcurrent fault detection. The Rate Limiter IP ensures smooth acceleration and deceleration profiles during speed transitions. This architecture demonstrates the efficiency of hardware-accelerated motor control with deterministic timing requirements.

Figure 1. PolarFire SoC Motor Control - Top Level Architecture

Key Features

  • Sensorless Field-Oriented Control (FOC) for BLDC motors
  • PLL-based rotor position and speed estimation
  • Real-time current sensing via external ADC (ADS7952)
  • Time-shared PI controllers for speed, Id, and Iq current loops
  • Space Vector PWM (SVPWM) using Min-Max method
  • Configurable PI controller gains for speed and current loops
  • Programmable PWM dead-time, delay-time, and switching frequency
  • Overcurrent fault detection and protection
  • Rate limiter for smooth acceleration/deceleration
  • Web-based dashboard for motor monitoring and control (Bokeh)
  • Gigabit Ethernet (MAC0) for network connectivity

Demo Requirements

Hardware Requirements

Item Details
PolarFire SoC Motor Control Kit MPFS095T-MOTOR-CONTROL-KIT
Kit Contents:
- PolarFire SoC MPFS095-FCSG536_SOM Module
- Motor Control Kit Carrier Board
- 24V AC adapter
- USB Type-C cable
BLDC Motor BLY171D-24V-4000 3-phase BLDC motor
Included with kit, pre-connected to PWM outputs (U, V, W phases)
Host PC A PC with USB port, Ethernet port, and web browser (Chrome, Firefox, or Edge)
Ethernet Cable CAT5e or better for network connectivity to dashboard

Figure 2. PolarFire SoC Motor Control Kit

Software Requirements

Item Details
FPGA Programming Job File MPFS095_SOM_BLDC.job
Download from the project's release assets.
See Appendix B: Programming the Device Using FlashPro Express
Linux Image File mchp-base-image-mpfs-motor-control-kit-bldc.rootfs.wic.gz
Download from the project's release assets.
See Appendix H: Flashing Linux Image to eMMC
FlashPro Express For programming the FPGA with the .job file
Refer to FlashPro Express User Guide
USBImager For flashing the Linux .wic image to eMMC storage
Download USBImager
Terminal Application PuTTY, TeraTerm, or Minicom for serial console communication
Configuration: 115200 baud, 8N1
7-Zip For extracting compressed .wic.gz image file
Download 7-Zip

Demo Prerequisites

Before beginning the setup process, download the programming job file from this repository's release assets and the compatible Linux .wic image.

  • Download the programming MPFS095_SOM_BLDC.job file from assets.
  • Download the compatible Linux mchp-base-image-mpfs-motor-control-kit-bldc.rootfs-xxxxx.wic.gz image from here.

Demo Setup

Hardware Setup

Follow these steps to configure your Motor Control Kit board:

1. BLDC Motor Connection

  • Connect the 3-phase BLDC motor to the motor output connector (J7)

2. Power Connection

  • Connect 24V DC power supply to the power connector (J5)

3. Ethernet Connection

  • Connect RJ45 Ethernet cable to the Ethernet connector (J3)
  • Connect the other end to your host PC
  • The board is configured with IP address 192.168.0.2. Configure your host PC's Ethernet interface to any IP in the 192.168.0.x range except 192.168.0.2 (e.g., 192.168.0.101)

4. Serial Console

  • Connect USB Type-C cable to J18 for UART console access
  • Use a terminal application: PuTTY (Windows), TeraTerm (Windows), or Minicom (Linux)
  • Configure terminal: 115200 baud, 8 data bits, no parity, 1 stop bit, no flow control

5. eMMC Flash Connection (For Linux Image Programming)

Software Setup

Ensure your host PC has:

  1. Ethernet interface configured with an IP address in the 192.168.0.x range except 192.168.0.2 (e.g., 192.168.0.101)
  2. Web browser (Chrome, Firefox, or Edge) to access the motor control dashboard
  3. Terminal application for serial console access - PuTTY (Windows), TeraTerm (Windows), or Minicom (Linux)

Instructions to Run the Demo

This section describes how to configure and run the motor control demo. The following steps need to be performed after each power cycle of the Motor Control Kit.

Motor Control Kit Configuration

  1. Power on the Motor Control Kit using SW1 (with 24V DC supply connected) and wait for the login prompt to appear (~30 seconds)
  2. For setting up serial communication on a Linux host, see Appendix G: Linux Host Setup for Serial Communication
  3. Log in as root (no password required)
  4. Navigate to /opt/microchip/motor-control-bldc/app and execute ./motor_control_startup.sh

The following screenshot shows the console output during boot, including system services starting, Ethernet link establishment, and the login prompt.

Figure 3. Console Output - Linux Boot Sequence and Login

Key elements shown in the boot sequence:

  • System services initialization (OpenSSH, D-Bus, Network Configuration)
  • Ethernet PHY and RGMII link establishment on eth0
  • Login prompt showing mpfs-motor-control-kit-bldc
  • After login, the version banner displays the meta-mchp release version

The following screenshot shows the console output when running the startup script.

Figure 4. Console Output - Motor Control Startup Script

The startup script initializes the motor control system, configures the Ethernet interface with IP address 192.168.0.2, loads the required drivers, and starts the Bokeh web server for the GUI dashboard. When the startup completes successfully, you will see:

  • Motor Control startup complete
  • Access the web dashboard at http://192.168.0.2:5006
  • [motor_control_service]: Motor Control Service ready
  • Bokeh app running at: http://0.0.0.0:5006/gui

Host PC Configuration

  1. Configure your host PC's Ethernet interface with an IP address in the 192.168.0.x range (e.g., 192.168.0.101)
  2. Verify connectivity by pinging the Motor Control Kit: ping 192.168.0.2

Demo at a Glance

Open a web browser on the host PC and navigate to http://192.168.0.2:5006/gui to access the motor control dashboard.

Figure 5. Web Dashboard - Initial Ready State

The dashboard displays:

  • BLDC Motor Controls (left panel, top): Speed slider, START/STOP buttons, direction toggle, status indicator
  • Stepper Motor Controls (left panel, bottom): Speed slider, START/STOP buttons, direction toggle, status indicator
  • Live BLDC Plots (center): Real-time graphs showing Speed (RPM), Torque (pu), and Phase Current (mA)
  • Configuration Toggle (top right): Switch to show/hide motor configuration parameters

To control the BLDC motor:

  1. Set Speed: Use the slider to set the desired speed (10-4000 RPM range)
  2. Start Motor: Click the green START button. The Status indicator will change from "READY" to "RUNNING"
  3. Monitor Operation: Observe the live plots showing speed tracking, torque variation, and phase current waveforms
  4. Adjust Speed: While running, move the slider to change the target speed
  5. Change Direction: Click the DIRECTION button to toggle rotation direction
  6. Stop Motor: Click the red STOP button to halt operation

Figure 6. BLDC Motor Running at 2000 RPM - Live plots showing speed, torque, and phase current

Speed Variation Examples

The motor can operate across a wide speed range. The following screenshots demonstrate operation at different speeds.

Figure 7. BLDC Motor Running at High Speed (3695 RPM)

Figure 8. BLDC Motor Running at Low Speed (346 RPM) - Note the sinusoidal phase current waveform

Dual Motor Operation

Both the BLDC and Stepper motors can operate simultaneously.

Figure 9. Both BLDC and Stepper Motors Running Simultaneously

Configuration Parameters

Toggle the CONFIGURATION switch in the top-right corner to access motor parameter settings.

Figure 10. BLDC Motor Configuration Panel

The BLDC configuration panel provides:

  • PI Controllers: Current PI Kp/Ki, Speed PI Kp/Ki parameters
  • Motor Specifications: DC Voltage, Motor Current, Motor Speed, Number of Pole Pairs, Motor Resistance, Motor Inductance, Switching Frequency
  • Startup Mode: Select between different startup sequences
  • Sensorless Parameters: Closed Loop Speed threshold, Open Loop Current %, Open Loop Voltage, Angle PI Kp/Ki

Configuration Parameters: The Configuration panel allows modification of motor rated parameters for running motors other than the kit motor. Use the SET button to apply changes, GET to read current values, and Defaults to restore factory settings.

Caution: Incorrect parameter values may cause motor malfunction or damage. Ensure you understand the motor specifications before modifying these values.

Stopping the Motor Control Application

To stop the motor control application and unload drivers, run on the serial console:

./motor_control_stop.sh

The following screenshot shows the console output when stopping the motor control application:

Figure 11. Console Output - Motor Control Stop Script

Note: The traceback messages shown during shutdown are normal and indicate that command subscriber is cleaning up its context properly. The important confirmation is Motor Control BLDC stopped at the end.

Design Resource Utilization

Table 1. Design Resource Utilization

Resource Used Total Percentage
4LUT 10,208 93,516 10.92%
DFF 8,107 93,516 8.67%
User I/O 43 144 29.86%
uSRAM (RAM64x12) 7 876 0.80%
LSRAM (RAM1K20) 4 308 1.30%
Math (DSP/MACC) 12 292 4.11%
Global Clock Buffers 7 48 14.58%
PLL 1 8 12.50%
MSS 1 1 100%

Device Information

Table 2. Device Information

Parameter Value
Family PolarFire SoC
Device MPFS095T
Package FCSG536
Speed Grade -1
Core Voltage 1.0V
Temperature Range Industrial (-40C to +100C)

Design Description

Design Overview

This design implements a sensorless Field-Oriented Control (FOC) system for BLDC motors on the PolarFire SoC FPGA. The architecture leverages the heterogeneous computing capabilities of PolarFire SoC, combining the deterministic real-time processing of FPGA fabric with the flexibility of the RISC-V processor subsystem.

The key design objectives are:

  • Real-time motor control: The FOC algorithm executes entirely in FPGA fabric at 125 MHz, achieving sub-microsecond control loop latency independent of software execution
  • Sensorless operation: Rotor position is estimated from back-EMF using a PLL-based observer, eliminating the need for Hall sensors or encoders
  • Software configurability: All motor parameters and control gains are accessible via memory-mapped registers from Linux userspace
  • Multi-motor support: The architecture supports both BLDC and Stepper motor control axes with shared register interface logic

Control Flow

Software running on the MSS accesses motor control registers through FIC_0, which provides a 64-bit AXI4 interface to the fabric. The CoreAXI4Interconnect routes transactions to the axi4_block_if module, which implements an AXI4-Lite slave interface. This module decodes addresses and distributes read/write operations to individual motor control IP blocks through their respective interface modules (_if). Status data from multiple motor axes is selected by input multiplexer modules (_in) before being returned to software.

Clock and Reset Module

The clock_reset SmartDesign module generates all clock domains required by the design from a single 50 MHz reference clock input and provides synchronized reset signals to all fabric modules.

Figure 12. Clock and Reset Architecture

The PF_CCC (Clock Conditioning Circuit) IP core synthesizes the following output clocks.

Table 3. Clock Output Configuration

Clock Output Frequency Description Connected Modules
FABCLK_50MHz 50 MHz Reset synchronization clock CORERESET_PF
FABCLK_200MHz 200 MHz High-speed peripheral clock eMMC interface
FABCLK_125MHz_CPU 125 MHz CPU reference / Ethernet TX clock MSS REFCLK, GMII_TXCLK
FABCLK_125MHz 125 MHz Main fabric clock BLDC Axis, Stepper Axis, AXI Interconnect, ADC

The CORERESET_PF IP generates synchronized reset signals. Three input conditions (FIC0_DLL_LOCK, MSS_RESET_N, and EXTERNAL_RESET_N) are combined through an AND gate and fed to the EXT_RST_N pin of CORERESET_PF. The module then generates FABRIC_RESET_N, which is distributed to all fabric modules.

Figure 13. Reset Generation Architecture

Processor Subsystem

The PolarFire SoC MSS runs Linux and serves the web-based motor control dashboard. The MSS connects to the fabric motor control logic through FIC_0, which provides a 64-bit AXI4 initiator interface. This interface is routed through CoreAXI4Interconnect to the axi4_block_if module for register access.

Figure 14. MSS to AXI4 Interconnect Architecture

Control Interface Modules

The axi4_block_if module implements an AXI4-Lite slave interface that bridges the MSS to all motor control IP blocks. It performs address decoding using bits [16:12] to select the target IP block via one-hot encoding and routes register transactions accordingly.

Each motor control IP block has a corresponding interface module (_if) that handles register read/write operations. These modules provide configuration registers for motor parameters (PI gains, PWM timing, thresholds) and status registers for real-time values (measured currents, speed, state machine status).

Table 4. Control Interface Modules

Module Function
adc_if ADC scaling, current sensing, overcurrent threshold
pwm_if PWM period, dead-time, delay parameters
picon_if PI controller gains (Speed, Id, Iq)
sqmng_if Sequence manager - start/stop, mode, fault control
rlimit_if Rate limiter - acceleration/deceleration limits

The design supports multiple motor axes (BLDC and Stepper) through input multiplexer modules (_in). When software reads a status register, the _in module (e.g., adc_in, picon_in, sqmng_in) selects data from the appropriate motor axis based on address bit [9]. This enables a single set of interface modules to serve both BLDC and Stepper axes.

BLDC Motor Control Axis

The BLDC Axis implements sensorless Field-Oriented Control (FOC) for three-phase BLDC motors. All arithmetic operations use 18-bit fixed-point Q2.16 format as described in the table below. A value of 1.0 represents rated motor voltage/current/speed.

Table 5. Q2.16 Fixed-Point Format

Property Value
Total bits 18
Integer bits (incl. sign) 2
Fractional bits 16
Range -2.0 to +1.9999847
Smallest step 1 / 65536

Sensorless FOC Control Theory

This design implements sensorless Field-Oriented Control (FOC) based on back-EMF estimation, enabling motor operation without position sensors.

Why Sensorless Control?

Position sensors (resolvers, encoders, Hall sensors) have inherent disadvantages: reduced reliability, susceptibility to electromagnetic noise, increased costs, and additional wiring complexity. In sensorless control, the rotor position is estimated from the motor's back-EMF using a PLL-based estimator.

FOC Advantages:

  • Transformation of complex coupled AC motor model into a simple linear system
  • Independent control of torque (Iq) and flux (Id), similar to a DC motor
  • Fast dynamic response with good transient and steady-state performance
  • High torque and low current at startup
  • High efficiency across the operating range
  • Wide speed range through field weakening

FOC Algorithm Overview

Figure 15. Block Diagram of Sensorless FOC

The FOC algorithm operates through the following key stages:

1. Current Measurement and Transformation: Phase currents Ia and Ib are measured by external ADCs. The Clarke transformation converts these three-phase currents (using Ia + Ib + Ic = 0) to a two-axis orthogonal stationary reference frame (Ialpha, Ibeta). The Park transformation then rotates these stationary quantities to the rotor reference frame (Id, Iq) using the estimated rotor angle theta.

2. Current Control Loop: The d-axis current Id represents the flux component and is typically regulated to zero for maximum efficiency. The q-axis current Iq represents the torque component and is controlled by the speed PI controller output. Time-shared PI controllers regulate both Id and Iq to track their references.

3. Voltage Generation: The PI controller outputs Vd and Vq are transformed back to the stationary frame (Valpha, Vbeta) via the Inverse Park transformation, and then to three-phase voltages (Va, Vb, Vc) via the Inverse Clarke transformation.

4. Space Vector Modulation: The three-phase voltage commands are processed through Space Vector Modulation (SVM) to generate optimized PWM duty cycles with increased DC bus utilization.

5. Position and Speed Estimation: The PLL-based estimator computes rotor position theta and speed omega from the measured currents and applied voltages using the motor's back-EMF. This enables sensorless operation without Hall sensors or encoders.

BLDC Axis Block Diagram

Figure 16. Fabric Implementation - BLDC Motor Control

FOC Algorithm IP Blocks

The following sections describe the IP blocks used to implement the FOC system in the BLDC Axis.

ADC Scaling

An analog to digital converter (ADC) converts a voltage signal as input to a digital signal in a number of bits that depends on ADC resolution. Signals that are not available in voltage form, such as currents, are converted to a voltage signal before conversion to digital data. The digital signal output of the ADC that is relative to its bit width must be scaled to a value that can be properly interpreted by the system that processes the signal.

The ADC scaling block performs the following functions:

  • Auto offset computation: Involves disabling Pulse width modulation (PWM) and triggering the ADC by a pre-determined number of times (8192) to determine ADC offset.

    ChX_offset = adc_result_chX_i + ChX_offset
    
  • Scales raw ADC data into phase currents:

    I_ph = (adc_result_chX_i - (ChX_offset / 8192)) * (adc_scale_val_i / 256)
    
  • Detects over current fault: After phase current computation, which can be used to stop the motors immediately.

FOC Transformations

The FOC transformations block provides Clarke, Park, Inverse Clarke, and Inverse Park functionalities. The transforms use a shared multiplier block for optimum usage of resources.

Clarke Transformation

The measured motor phase currents are transformed from a stationary three-phase reference frame to an orthogonal two-axis stationary reference frame.

The Clarke transformation is expressed as:

I_alpha = I_a
I_beta = (1/sqrt(3)) * (I_a + 2*I_b)

where Ia and Ib = Three-phase quantities, Ialpha and Ibeta = Stationary orthogonal reference frame quantities.

Park Transformation

The two-axis orthogonal stationary reference frame quantities are transformed into rotating reference frame quantities using Park transformation.

I_d = I_alpha * cos(theta) + I_beta * sin(theta)
I_q = I_beta * cos(theta) - I_alpha * sin(theta)

where Id and Iq = Rotating reference frame quantities, theta = Angle of rotating reference frame.

Inverse Park Transformation

The quantities in rotating reference frame are transformed to two-axis orthogonal stationary reference frame using Inverse Park transformation.

V_alpha = V_d * cos(theta) - V_q * sin(theta)
V_beta = V_q * cos(theta) + V_d * sin(theta)
Inverse Clarke Transformation

The transformation from a two-axis orthogonal stationary reference frame to a three-phase stationary reference frame is accomplished using Inverse Clarke transformation.

V_a = V_alpha
V_b = (-V_alpha + sqrt(3) * V_beta) / 2
V_c = (-V_alpha - sqrt(3) * V_beta) / 2

Space Vector Modulation (SVM)

The output of the Inverse Clarke transformation provides the duty cycles of the PWM channels that correspond to the three-phase voltages. For sinusoidal excitation of the phase voltages, these duty cycle values can be used directly.

However, by using the space vector modulation (SVM) technique, the DC voltage utilization factor is increased. A simplified method, which is equivalent to the conventional modulation strategy, is used in the current implementation.

In this method, the instantaneous average of the minimum and maximum of all three-phase voltages is calculated as the voltage offset. This instantaneous voltage offset is then subtracted from each of the instantaneous three-phase voltages. This is known as the SVM Min-Max method (sine with third harmonics injection):

V_offset = [Min(V_a, V_b, V_c) + Max(V_a, V_b, V_c)] / 2

V_a' = (2/sqrt(3)) * (V_a - V_offset)
V_b' = (2/sqrt(3)) * (V_b - V_offset)
V_c' = (2/sqrt(3)) * (V_c - V_offset)

where Va', Vb', Vc' = Third harmonic injected phase voltages.

PWM Scaling

PWM scaling is used to scale down the voltages computed from the FOC to fit within the PWM carrier wave magnitude range. It also adds a bias to shift negative voltages to positive level.

The PWM scaling IP block performs the following functions:

  • Scaling of phase voltages according to the following equation:

    V_ph_o = (pwm_period_i * 32768 + (pwm_gain_i * V_ph_i) / 2) / 65536
    
  • To use the advantage of voltage boost provided by SVM, pwm_gain_i can be multiplied by a factor of 1.15:

    pwm_gain_i = (pwm_period_i * 1182) / 1024
    

Note: The pwm_period variable is related to PWM switching frequency configured in PWM3ph IP.

PWM Generation (Three-Phase PWM)

Generation of three-phase, center aligned PWM is supported in the design. Dead time insertion logic is included to avoid catastrophic short circuit conditions of the inverter's high and low-side switches. A total of six PWM signals are generated; three for the high-side switches and three for the low-side switches. The PWM for high and low-side switches are complementary for the same inverter leg.

Dead Time Configuration:

Turn-off time is one of the characteristics of switching devices. This is the time between removing the gate signal and extinguishing the current completely. In an inverter, when one of the two phase switches is turned OFF, and the other switch is turned ON before the lower switch extinguishes the current flowing through it completely, a dead short occurs. To avoid this, a break-before-make logic feature is implemented.

Sequence Controller

Implementation of FOC of AC motor needs an intelligent state machine (FSM) apart from the transformations and closed loop control. It is useful to have all the state transitions managed in a single IP module. The Sequence Controller IP manages the starting, stopping, fault, and fault clear operations through FSM. It also manages the transition from closed loop to open loop and vice versa. It acts as a master block that controls all other IPs involved in FOC.

The sequence controller triggers the ADC sampling and conversion, enables and disables the PWM based on the motor operating state and also enables and disables current and speed PI controllers.

Table 6. Sequence Controller States

State Value Description
INIT 0x00 Power-on initialization, waiting for system ready
CALIBRATE 0x01 ADC offset calibration
STOP 0x03 Motor stopped, PWM disabled
OPEN_LOOP 0x04 V/Hz startup mode
CLOSED_LOOP 0x05 Sensorless FOC running
FAULT 0x06 Fault condition detected

Open-Loop Management Block

The open-loop management block provides the following functionality:

  • Calculating open-loop angle based on the speed reference
  • Switching between open-loop angle and closed-loop angle
  • Providing open-loop current references or open-loop voltage references

PI Controller (Speed_Id_Iq_PI)

PI controller is the widely used closed-loop controller for controlling a first order system. The basic functionality of a PI controller is to make the feedback measurement track the reference input. It controls its output till the error between reference and feedback signals is zero. There are two components that contribute to the output, the proportional term and the integral term.

The proportional term depends only on the instantaneous value of the error signal, whereas the integral term depends on the present and previous values of error.

Discrete PI Implementation (Zero Order Hold Method):

P(n) = K_p * e(n)                    // Proportional term
I(n) = K_i * T_s * e(n) + I(n-1)     // Integral term with accumulator
Y(n) = P(n) + I(n)                   // Total output

where P(n) = Proportional term output, I(n) = Integral term output, I(n-1) = Previous (buffered) value of Integral output, Ts = Sampling time in discrete domain.

Anti-Windup and Initialization:

The PI controller has minimum and maximum limits for its output to keep it within practical values. If a non-zero error signal persists for a long time, the integral component of the controller increases and reaches a maximum bit width limit. This phenomenon is called integrator windup and has to be avoided to have proper dynamic response. The PI controller IP has an automatic anti-windup function that limits the integrator when the PI controller reaches the saturation point.

Time Sharing of PI Controllers:

In FOC algorithm, there are three PI controllers for speed, d-axis current Id, and q-axis current Iq. The input of one PI controller depends on the output of other PI controller and therefore they are executed sequentially. At any instant, there is only one instance of PI controller in operation. Therefore, instead of using three individual PI controllers, a single PI controller is time shared for speed, Id and Iq for optimum usage of resources.

The Speed_Id_Iq_PI module allows sharing PI controller through start and done signals for each of speed, Id, and Iq. The tuning parameters Kp, Ki and minimum and maximum limits of each instance of the controller can be configured independently through corresponding inputs.

Control Parameters

Table 7. BLDC Control Parameters

Parameter Register Description Range
Speed Setpoint bldc_rl_in_i Target speed input to rate limiter 10-4000 RPM
Direction bldc_direction_i Motor rotation direction 0=Fwd, 1=Rev
Speed Kp bldc_speed_pi_kp_i Speed loop proportional gain Q2.16 format
Speed Ki bldc_speed_pi_ki_i Speed loop integral gain Q2.16 format

PLL-Based Position/Speed Estimator (BLDC Estimator)

The position and speed estimator block computes the rotor position based on the motor parameters, voltages, and currents. The algorithm is based on back-emf estimation and filtering. The motor parameters Rs, Ls, and the sampling time Ts are used to build the motor model. The voltages that are fed to the actual motor are fed to the motor model along with motor currents and are used to compute back-EMF.

A PLL structure is used to find the angle of filtered-back EMF, which is aligned to the rotor electrical position. The motor can accelerate or decelerate rapidly in which case the rate of change of rotor position has to be dynamically and accurately tracked by the PLL. This is achieved by proper tuning of the PI controller that is part of the PLL.

Rate Limiter

Rate limiter is generally used to generate a smooth speed profile while changing from one speed to another. The rate of change of output remains the same whether the output increases or decreases with respect to time. The output slope is configured by two parameters-rate count and slew count.

The rate limiter IP also has a reset ramp input, which forces the output to become zero instantaneously, irrespective of the input value. This feature is useful for auto-restart in motor control application to initialize speed reference output from the rate limiter to zero before starting the motor again.

The soft stop input forces the output to become zero, irrespective of the input value. The output goes towards zero according to the ramp profile configured by the slew count and the rate count. When the output reaches zero, the soft stop is asserted in acknowledgment.

ADC Interface

The external ADC interface provides high-resolution current sensing using ADS7952 12-bit ADCs.

Figure 17. ADC Signal Chain

Ethernet Interface

Gigabit Ethernet is implemented using a PF_RGMII_TO_GMII IP core for RGMII to GMII protocol conversion on MAC0.

Table 8. Ethernet Interface Configuration

Component Description
MAC_0 Ethernet interface (192.168.0.2)

Software Implementation

The motor control software stack runs on Linux within the PolarFire SoC Microprocessor Subsystem (MSS). Configuration parameters are transmitted to the PolarFire SoC Fabric layer through Linux kernel frameworks and the drivers subsystem.

Figure 18. Software Implementation Architecture

Software Architecture Layers

The software stack is organized into three primary layers:

  • User Space Applications: Motor control library (C++ with Python bindings), web dashboard (Bokeh gui.py), sysfs interface (/sys/bus/iio/devices/), IIO buffered readout (/dev/iio:deviceX), and command subscriber
  • Linux Kernel - IIO Subsystem: Six IIO platform drivers provide sysfs-based register access:
    • mpfs_mc_adc - ADC scaling, current sensing, speed feedback with kfifo buffered acquisition
    • mpfs_mc_pwm - 3-phase PWM period, dead time, delay, and gain configuration
    • mpfs_mc_picon - PI controller for speed and current loop Kp/Ki tuning
    • mpfs_mc_sqmng - Sequence manager for start/stop, fault clear, and FSM state
    • mpfs_mc_ratelim - Rate limiter for speed reference and direction configuration
    • mpfs_mc_stptheta - Stepper theta for position command (stepper motor only)
  • PolarFire SoC Fabric: MSS FIC_0 64-bit AXI4 interface, CoreAXI4 Interconnect for address routing, and motor control IP blocks (ADC_SCALING, PWM3PH, PI_CTRL, SEQ_CTRL, RATE_LIM) at base address 0x6000_0000

Web Dashboard

The Bokeh-based web interface (gui.py) provides real-time motor monitoring and control capabilities:

  • Motor Control: Start/Stop motor, change direction, set target speed
  • Speed Visualization: Real-time speed feedback display using IIO buffered readout
  • PI Tuning: Interactive sliders for adjusting speed loop Kp and Ki gains
  • Motor State: Visual indicators showing current motor state (Stopped, Running, Fault)
  • Configuration: Motor parameters configuration for different motor types

Access the dashboard at http://<board-ip>:5006/gui after starting the motor control application.

Motor Control Library

The motor control library (motor.cpp/motor.h) provides a C++ API with Python bindings for programmatic motor control. The library interfaces with the IIO drivers through sysfs for register access and /dev/iio:deviceX for buffered data acquisition.

Key API classes:

  • Motor: Main motor control class supporting both BLDC and Stepper motor types with methods for start/stop, speed, direction, and PI gain configuration
  • BLDCSpecs/BLDCParams: BLDC motor specification and control parameter structures
  • StepperSpecs/StepperParams: Stepper motor specification and control parameter structures

Device Tree Overlay

The device tree overlay (mpfs_motor_control_bldc.dtso) defines the IIO device nodes that bind to the IIO drivers. Each motor control IP block is mapped to a specific address in the fabric address space:

Table 9. Device Tree Device Node Configuration

Device Node Compatible String Address
adc-scaling microchip,adc-scaling-rtl-v4.3 0x6000_0000
pwm3ph microchip,pwm3ph-rtl-v4.2 0x6000_1000
speed-id-iq-pi microchip,speed-id-iq-pi-rtl-v4.2 0x6000_2000
seq-controller microchip,seq-controller-rtl-v4.2 0x6000_3000
rate-limiter microchip,rate-limiter-rtl-v4.2 0x6000_4000
stepper-theta microchip,stepper-theta-rtl-v4.2 0x6001_0000

Appendix A: Design Creation Using TCL Scripts

To regenerate the design from Tcl scripts:

  1. Clone or download this repository to a local path with no spaces
  2. Open Libero
  3. Open the execute-script dialog with Project -> Execute Script... (or CTRL + U)
  4. Browse to script.tcl and run it. No arguments are required
  5. The script creates the project, builds the design, runs the full implementation flow, and exports the programming files

Tcl Script Structure

Table 10. Tcl Script Structure

Stage Script Purpose
1 1_create_design.tcl Generates the MSS component from its .cfg and imports it, builds the fabric components and the top-level SmartDesign
2 2_constrain_design.tcl Imports the I/O constraints (io_constraints.pdc) and derives the SDC timing constraints
3 4_implement_design.tcl Runs Synthesis, Place and Route, and Verify Timing
4 5_program_design.tcl Generates programming/initialization data, configures the eNVM client (HSS), and exports the bitstream and FlashPro Express programming job file

Programming the FPGA from Libero

After the script completes, the design can be configured further if needed and the Libero SoC design flow can be run by double clicking on a stage from the Libero Design Flow panel. Double-clicking a stage automatically runs any prerequisite steps before it.

To program the device from Libero:

  1. In Libero, expand Program and Debug Design
  2. Connect the board and run Run PROGRAM Action

The script also exports a standalone programming job at designer/export/*.job, which can be loaded in FlashPro Express to program the device without Libero.

Appendix B: Programming the Device Using FlashPro Express

Use FlashPro Express to program the FPGA with the MPFS095_SOM_BLDC.job file.

  1. Download and install FlashPro Express from the Microchip website
  2. Connect the Motor Control Kit to your PC via USB (J18 connector)
  3. Launch FlashPro Express
  4. Select New Project and browse to the MPFS095_SOM_BLDC.job file
  5. Click Program to program the device
  6. Wait for programming to complete (progress shown in console)

Note: Ensure the board is powered on and properly connected before programming.

Appendix C: PWM Output Pinout

BLDC PWM Output Pinout

Table 11. BLDC PWM Output Pinout

Signal Description I/O Standard
pwm_uh BLDC Phase U High-side LVCMOS 1.8V
pwm_ul BLDC Phase U Low-side LVCMOS 1.8V
pwm_vh BLDC Phase V High-side LVCMOS 1.8V
pwm_vl BLDC Phase V Low-side LVCMOS 1.8V
pwm_wh BLDC Phase W High-side LVCMOS 1.8V
pwm_wl BLDC Phase W Low-side LVCMOS 1.8V

Appendix D: Stepper Motor Control Axis

Note: The Stepper motor axis is included in the design but is optional and not part of the standard demo kit. This section is provided for reference if a stepper motor is connected.

Stepper Motor Overview

Stepper motor is used for position control by moving through certain number of steps. While a stepper motor has a fixed number of steps per revolution, it is possible to move through microsteps, thereby improving step resolution. Microstepping also reduces torque ripple and power losses in the motor.

Stepper Axis Block Diagram

Figure 19. Fabric Implementation - Stepper Motor Control

Key Differences from BLDC Axis

Table 12. BLDC vs Stepper Axis Feature Comparison

Feature BLDC Axis Stepper Axis
Control Mode Speed (velocity) Position (theta/step)
Position Estimation PLL-based sensorless (BLDC_ESTIMATOR) Command-based (STEPPER_THETA)
Number of Phases 3-phase (U, V, W) 2-phase (A and B)
Speed Control Speed PI loop No speed loop (position only)
Additional IPs SVM, OLMNG, RATE_LIMITER STEPPER_THETA only

Stepper Axis IP Blocks

The stepper motor control axis uses a subset of the BLDC axis IPs plus the STEPPER_THETA block:

Stepper Theta Generation

The IP block generates theta that is used by stepper motor control algorithm. It is possible to select micro-stepping up to 2048 microsteps. The IP allows running the motor in speed mode or position mode.

The profile of the stepper theta generation output and the resultant current for various microstepping options:

  • Full Step Mode: Square wave current profiles for phase A and B
  • Half Step Mode: Intermediate positions between full steps
  • Quarter Step Mode (Micro-Stepping): Smoother sinusoidal-like current profiles
  • 1/1024 Step Mode (Micro-Stepping): Near-perfect sinusoidal current profiles

The amount of microstepping is decided by the rate limit input and must be an exponent of two. The slew count input then decides the speed at which the theta value is updated. The output theta is generated till the command number of steps are met and then theta is held at the last updated value until command steps change. However, in speed mode, the output theta is continuously updated.

Shared IP Blocks with BLDC Axis

The following IP blocks are shared between BLDC and Stepper axes but configured differently for 2-phase operation.

Table 13. Shared IP Blocks with BLDC Axis

IP Block Stepper Configuration
ADC Scaling Same as BLDC - scales raw ADC to phase currents (Ia, Ib)
FOC Transformations 2-phase mode - Clarke/Park for orthogonal currents (already orthogonal)
Speed_Id_Iq_PI Only Id/Iq loops active, no speed loop (current reference from position)
PWM Scaling Same as BLDC - scales Vd/Vq to PWM range
Three-Phase PWM 2-phase mode - Only PWM A+/A- and PWM B+/B- used
Sequence Controller Simplified state machine for stepper operation

Stepper Motor Control Operation

The APB3 interface programs registers in various blocks from the MSS. The FOC angle is generated by the stepper theta generation block, which can be configured to produce angles at a given motor speed and step resolution.

The following steps summarize the operation of FOC implementation for a stepper motor:

  1. The ADC interface obtains raw data from the ADC. This data is passed to the ADC scaling block.
  2. The ADC scaling block scales the raw data and removes the offset to produce the motor phase currents. The result is passed to the FOC transformations block as Park inputs. The ADC scaling block can also detect if the current level is above safe levels and issues a fault signal to the sequence controller.
  3. The FOC transformations block uses the phase currents that are already orthogonal to compute the two-phase rotating reference frame currents (Id and Iq) using the FOC angle. The currents obtained are regulated using the PI controller.
  4. The PI controller block is time scheduled to operate on Id and Iq. Depending on the torque requirement, a current reference is set to the Id PI, while the actual Id value is received from the FOC transformations block. The output of the Id PI is assigned as Vd. The reference to the Iq PI is tied to zero, while the actual value is obtained from the FOC transformations block. The output of the block is assigned as Vq.
  5. The FOC transformations block converts Vd and Vq values (two-phase rotating reference frame) into Valpha and Vbeta (two-phase orthogonal stationary reference frame) using the inverse Park transform.
  6. The three-phase PWM block converts the voltages into PWM signals. Only two of the three phases are used.

Stepper Control Parameters

Table 14. Stepper Control Parameters

Parameter Register Description Range
Step Count stepper_cmd_step_no_i Target position in steps 0 - 2^24
Speed stepper_slew_cnt_i Motor speed 1 - 100 RPM
Microstep Resolution stepper_rate_limit_i Microstepping divisor (power of 2) 1, 2, 4, 8, ... 2048
Current Reference stepper_id_pi_ref_input_i Torque current reference Q2.16 format
Id Kp stepper_id_pi_kp_i D-axis current proportional gain Q2.16 format
Id Ki stepper_id_pi_ki_i D-axis current integral gain Q2.16 format
Iq Kp stepper_iq_pi_kp_i Q-axis current proportional gain Q2.16 format
Iq Ki stepper_iq_pi_ki_i Q-axis current integral gain Q2.16 format

Stepper PWM Output Pinout

Table 15. Stepper PWM Output Pinout

Signal Description I/O Standard
stepper_pwm_ah Phase A High-side LVCMOS 1.8V
stepper_pwm_al Phase A Low-side LVCMOS 1.8V
stepper_pwm_bh Phase B High-side LVCMOS 1.8V
stepper_pwm_bl Phase B Low-side LVCMOS 1.8V

Stepper Motor GUI Configuration

The web dashboard provides a dedicated configuration panel for stepper motor parameters. To access the stepper configuration:

  1. Enable the CONFIGURATION toggle in the top-right corner of the dashboard
  2. Click the STEPPER tab to switch to stepper motor parameters.

Figure 20. Stepper Motor Configuration Panel

The Stepper configuration panel provides:

  • PI Controllers:
    • Current PI Kp: Proportional gain for current control
    • Current PI Ki: Integral gain for current control
  • Stepper Control:
    • Current Reference (mA): Target phase current
    • Command Steps: Number of steps to move (position mode)
    • Speed (RPM): Motor rotation speed
  • Motor Specifications:
    • DC Voltage (mV): Supply voltage
    • Motor Current (mA): Rated motor current
    • Step Number: Steps per revolution (e.g., 200 for 1.8-degree stepper)
    • Microstep Resolution: Microstepping divisor (1, 2, 4, 8, ... up to 2048)
    • Motor Resistance (mOhm): Phase resistance
    • Motor Inductance (uH): Phase inductance
    • Switching Freq (kHz): PWM switching frequency

Use the control buttons:

  • SET: Apply the entered parameter values to the hardware
  • GET: Read current parameter values from the hardware
  • Defaults: Restore factory default parameter values.

Figure 21. Stepper Motor Running with Configuration Panel Visible

When the stepper motor is running, the Status indicator on the left panel shows "RUNNING" in green. The direction can be toggled between CLOCKWISE and COUNTER CLOCKWISE using the DIRECTION button.

Note: The stepper motor plots are not displayed in the Live BLDC Plots section. The plots always show BLDC motor data. To monitor stepper operation, observe the Status indicator and Direction display in the Stepper Motor control panel.

Appendix E: IP Core Versions

Table 16. IP Core Versions

IP Core Version Description
PF_CCC 2.2.222 Clock Conditioning Circuit
COREAXI4INTERCONNECT 2.8.103 AXI4 Interconnect
CORERESET_PF 2.3.100 Reset Controller
PFSOC_INIT_MONITOR 1.0.309 Initialization Monitor
PF_RGMII_TO_GMII 1.3.111 RGMII to GMII Converter
ADC_SCALING 4.3.0 ADC calibration and scaling
FOC_TRANSFORMS 4.2.0 Clarke/Park transforms
SPEED_ID_IQ_PI 4.2.0 Time-shared PI controllers
SPACE_VECTOR_MODULATION 4.2.0 SVPWM generation
PWM3PH 4.2.0 Three-phase PWM
RATE_LIMITER 4.2.0 Acceleration limiter
SEQ_CONTROLLER 4.2.0 Motor state machine
BLDC_ESTIMATOR 4.2.0 PLL position/speed estimator

Appendix F: Troubleshooting Guide

Serial Terminal Issues

Table 17. Serial Terminal Issues

Issue Solution
No output on serial console Verify USB cable connection, check terminal settings (115200 8N1), ensure correct COM port selected
Garbled characters Verify baud rate is set to 115200
Console freezes Check power supply, try power cycling the board

Network & GUI Connectivity

Table 18. Network and GUI Connectivity Issues

Issue Solution
Cannot access GUI at 192.168.0.2:5006 Verify host PC IP is in 192.168.0.x subnet, check Ethernet cable connection, ensure motor_control_startup.sh completed successfully
GUI loads but shows no data Check if motors are initialized (look for "Motor Control Service ready" message), try refreshing the browser
Ethernet link not established Check cable connection, verify PHY LED indicators on board

Motor Control Issues

Table 19. Motor Control Issues

Issue Solution
Motor does not start Verify 24V power supply is connected, check motor phase connections, ensure Status shows "READY" before clicking START
Motor vibrates but doesn't rotate Check phase wire connections (U, V, W), verify motor is compatible with kit specifications
Overcurrent fault Reduce speed, check for mechanical obstructions, verify motor specifications match configuration
Speed not tracking setpoint Adjust PI controller gains in Configuration panel, ensure motor is within operating range

Appendix G: Linux Host Setup for Serial Communication

This section describes how to set up serial communication between a Linux host PC and the Motor Control Kit using Minicom.

Identifying the Serial Port

  1. Before connecting the USB cable, run ls /dev/ttyUSB* to list existing serial ports
  2. Connect the USB Type-C cable to J18 on the Motor Control Kit
  3. Run ls /dev/ttyUSB* again to identify the new port (typically /dev/ttyUSB0)

Installing Minicom

sudo apt update
sudo apt install minicom

Configuring Minicom

Method 1: Using Configuration Menu

  1. Run sudo minicom -s
  2. Select "Serial port setup"
  3. Set Serial Device to the identified port (e.g., /dev/ttyUSB0)
  4. Set Bps/Par/Bits to 115200 8N1
  5. Set Hardware Flow Control to "No"
  6. Set Software Flow Control to "No"
  7. Select "Save setup as dfl" to save as default
  8. Select "Exit" to start the terminal

Method 2: Command Line

sudo minicom -b 115200 -o -D /dev/ttyUSB0

Exiting Minicom

To exit Minicom, press Ctrl+A, then Z, then X.

Note: Once serial communication is established, see the Instructions to Run the Demo section to continue with the demo setup.

Appendix H: Flashing Linux Image to eMMC

This section describes how to flash the Linux image (mchp-base-image-mpfs-motor-control-kit-bldc.rootfs.wic.gz) to the Motor Control Kit's eMMC storage.

Prerequisites

  • Download the Linux image file: mchp-base-image-mpfs-motor-control-kit-bldc.rootfs.wic.gz
  • Install 7-Zip for extracting the compressed image
  • Install USBImager for flashing the image

Flashing Procedure

  1. Extract the .wic.gz image using 7-Zip to obtain the .wic file
  2. Connect USB Type-C cable to J17 on the Motor Control Kit for eMMC access
  3. Power on the board and interrupt the boot process by pressing any key at the HSS prompt
  4. At the HSS prompt, type usbdmsc to expose the eMMC as a USB mass storage device
  5. Launch USBImager on your host PC
  6. Select the extracted .wic file as the source image
  7. Select the eMMC device (appears as a USB drive) as the target
  8. Click Write and wait for the flashing process to complete
  9. After flashing completes, safely eject the USB device
  10. Reset the board to boot from the newly flashed Linux image

Note: For more detailed instructions, refer to Updating PolarFire SoC Kit.

Glossary

Table 20. Glossary

Term Definition
BLDC Brushless DC Motor - A synchronous motor powered by DC electricity via an inverter
FOC Field-Oriented Control - A motor control technique that decouples torque and flux control
Clarke Transform Mathematical transformation converting 3-phase quantities to 2-axis orthogonal stationary frame
Park Transform Mathematical transformation converting stationary frame to rotating reference frame
SVM Space Vector Modulation - PWM technique for improved DC bus utilization
PI Controller Proportional-Integral Controller - Closed-loop control algorithm
PLL Phase-Locked Loop - Used for rotor position estimation in sensorless control
Q2.16 Fixed-point number format with 2 integer bits (including sign) and 16 fractional bits. Range: -2.0 to +1.9999847
MSS Microprocessor Subsystem - The processor complex in PolarFire SoC
FIC Fabric Interface Controller - Interface between MSS and FPGA fabric
HSS Hart Software Services - Zero-stage bootloader for PolarFire SoC
eNVM Embedded Non-Volatile Memory - On-chip flash memory for boot code
AXI4 Advanced eXtensible Interface 4 - High-performance bus protocol
RGMII Reduced Gigabit Media Independent Interface - Ethernet PHY interface
IIO Industrial I/O - Linux kernel subsystem for sensor/actuator interfaces

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Motor control reference design for the PolarFire SoC Motor Control Kit - MPFS095 SoM

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