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P3-A1.1: add live deterministic SV signal control - #44

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masarray merged 15 commits into
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feature/sv-live-control-runtime
Aug 11, 2026
Merged

masarray merged 15 commits into
mainfrom
feature/sv-live-control-runtime

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@masarray masarray commented Aug 10, 2026 •

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Summary

Add the first vendor-neutral live control plane for the deterministic ESP32-P4 Sampled Values publisher. This implements the runtime half of the target workflow: configure signal values, START publication, change signal values while RUNNING, and STOP without rebuilding firmware or changing canonical stream identity.

Implemented

  • SvLiveSignalState with per-channel RMS raw counts, phase, quality and enable state plus signal frequency;
  • data-race-free triple-buffer signal generations;
  • fixed-point phase/sine synthesis in the realtime path;
  • missed-slot phase advancement;
  • quality patching alongside each INT32 sample;
  • START/STOP runtime gating;
  • live SET/FREQ/QUALITY/ENABLE/ZERO changes without smpCnt restart;
  • telemetry with signal generation;
  • temporary serial bench commands retained as fallback/debug transport;
  • regression tests and live-injection state-machine documentation.

Realtime boundary

The realtime publisher does not parse XML/text, rebuild BER, allocate per sample, log per sample, or take a host-facing mutex. It copies one coherent signal generation at a sample boundary, synthesizes values, patches the prebuilt template and transmits.

Profile identity/layout changes remain immutable while running and require STOP/re-arm. The SCL-driven compiled-profile bridge is delivered by the subsequent stacked integration PR.

Acceptance

  • C++ CI green on Linux GCC/Clang and Windows MSVC
  • sanitizer/security/evidence gates green
  • ESP32-P4 cross-build green
  • Embedded Profile CI green
  • Dynamic RCB Trial Harness CI green
  • physical bench: START -> ~4000 fps with retained telemetry showing missed=0 and TX fail=0
  • physical bench: live value updates change waveform without stream restart
  • physical bench: ordinary engineering phase control verified through the GUI layer built on this runtime
  • physical bench: STOP/START behavior exercised successfully

This PR is the runtime foundation for the completed GUI + SCL-driven injector flow in the subsequent stacked PRs.

@masarray
masarray marked this pull request as ready for review August 11, 2026 07:59
@masarray
masarray merged commit bbb4001 into main Aug 11, 2026
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💡 Codex Review

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Reviewed commit: fe7e24eaf2

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continue;
}

if (take_start_request()) {

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P1 Badge Consume START and running state atomically

If START arrives after this exchange but before the following live_tx_running() check, the publisher observes running == true and transmits one frame using the old phase and sample counter; it consumes the pending reset only on the next tick. This can produce a stale frame followed by a counter reset or duplicate during every initial/restart transition, violating the defined clean START boundary. Represent the request/running transition as one atomic state or recheck the request after observing the running transition.

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Comment on lines +63 to +64
const auto copy = banks_[index];
reader_index_.store(kNoReader, std::memory_order_release);

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P2 Badge Track every concurrent snapshot reader

When the publisher snapshots on CPU1 while the control task snapshots for SHOW or an update on CPU0, either reader can clear this single shared reader_index_ while the other is still copying. A subsequent publish may then reuse that reader's bank and write the non-atomic SvLiveSignalState concurrently with its copy, yielding undefined behavior or a mixed generation. The application does not serialize these readers, so the bank needs per-reader tracking or another protocol that cannot erase another reader's reservation.

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