[masarray]

M4-P0C2A: implement reusable shared time grid planning before invasive ESP32 publisher refactor. Reuses the existing M4 3-SV capacity/rate contracts.

• One PTP lease generation, one absolute 4000Hz tick sequence; planner maps each qualified sample tick to at most three SV frame descriptors in deterministic MU1→MU2→MU3 order, with identical smpCnt and smpSynch.
• Three independent per-stream enable flags, without resets to sibling counters or global sample phase.
• Prevent replay of missed ticks; count missed slots rather than bursting stale data.
• On PTP source generation change, invalid/unqualified timing, or duplicate/non-monotonic tick, fail-closed for the group until explicit re-arm.
• New C++ CTest checks 8000 ticks / 24000 frame descriptors across 2 seconds, stream 2 stop/start isolation, modulus wrap at 4000, skip backlog, lease generation revocation and no bogus lock status.

Precise scope: This is a portable pure scheduler/planner foundation, NOT live firmware SV output or an implemented PTP servo. M4-P0C2B must connect this logic to the existing GPTimer+EMAC clock and publisher loop, then measure 3 packets per 250us. M4-P0D adds isolated waveform banks, M4-P0E GUI pagination. Keep M3.H.3 official stable unchanged.

References: #333; docs/ARD_M4_THREE_SV_SCL_SHARED_PTP_STUDIO.md; P0C1 PR #336.

[chatgpt-codex-connector]

Codex Review Summary

This comment shows the latest Codex review activity on this pull request.

Review	Status	Commit	Review trigger
📝 Code Review	✅ Completed 2026-10-25T20:17:37.217852Z	24b8f73	PR opened

ℹ️ About Codex in GitHub

Your team has set up Codex to review pull requests in this repo. Reviews are triggered when you

• Open a pull request for review
• Mark a draft as ready
• Comment "@codex review" or "@codex security review".

Codex reacts with 👀 while any review is running, comments if it has suggestions, and reacts with 👍 once all reviews finish with no findings.