Repository navigation
VHDL, mux/operator symbols, najaeda 0.7.33+ (merge after next najaeda release) - #33
Merged
Merged
Conversation
- Load VHDL through naja's experimental frontend: native positional .vhd/.vhdl files (any order), File > Open VHDL..., and --vhdl on the naja-schematic server (NLDB.loadVHDL()). --top applies to SystemVerilog and VHDL; --liberty/--yosys-src are rejected with both. - Python loaders use najaeda's raw naja API only (loadGateLevelVerilog/loadSystemVerilog/loadVHDL/loadLibertyPrimitives); --top reaches slang through frontend_options. - Draw muxes as trapezoids and the word-level operators SystemVerilog lowers to (add, sub, mul, shifts, divmod) as boxes with an operator glyph, typed from naja's modeling checks, never from names. - Python API takes and returns naja SNLPath for instances. - Require najaeda >= 0.7.33, bump the naja submodule, add SV/VHDL test designs.
…agnostics log out of the working tree
…ptions aren't in 0.7.33; time out hung test jobs
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Do not merge until the next najaeda release (after 0.7.33) is on PyPI.
--topfor SystemVerilog goes throughfrontend_options={"slang": ["--top", name]}, which needs a najaeda newer than 0.7.33. When it's published, bump the minimum inpython/pyproject.tomland the oldest version in thepython-package.ymlmatrix, then mark the PR ready.Changes
VHDL through naja's experimental frontend:
.vhd/.vhdlfiles, in any order, plus File > Open VHDL...--vhdl, viaNLDB.loadVHDL().--topworks with SV and VHDL.--libertyand--yosys-srcare rejected with both, the same rule on both CLIs.Python loaders use only najaeda's raw
najaAPI (loadGateLevelVerilog,loadSystemVerilog,loadVHDL,loadLibertyPrimitives).Symbols: muxes are drawn as trapezoids. The word-level operators SystemVerilog lowers to (add, sub, mul, shl/shr/ashr, divmod) are drawn as boxes with a circled operator glyph. Types come from naja's modeling checks (
isMux,isAddSub,isMultiply,isShift,isDivMod), never from names.Python API takes and returns naja
SNLPathfor instances.Dependencies and tests: the naja submodule is bumped and the package requires
najaeda>=0.7.33. New SV/VHDL test designs are undertests/data/.Test plan
pytest python/testsagainst the new najaeda releasectest(LocalSNLProviderProtocolTest, SchematicLayoutTest)