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tests: Add Apple Silicon CPU bottleneck benchmarks. - #17

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tests: Add Apple Silicon CPU bottleneck benchmarks.#17
jungwuk-ryu wants to merge 5 commits into
mainfrom
perf/apple-silicon-bottleneck-benchmarks

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Summary

Add a black-box x86-64 Windows microbenchmark suite for identifying CPU-provider bottlenecks on Apple Silicon.

The benchmark follows Apple's CPU-optimization workflow: isolate one processor behaviour, collect repeated in-process measurements, compare baseline and candidate runtimes on the same Mac, and use Instruments CPU Counters or Processor Trace to explain regressions rather than inferring a cause from elapsed time alone.

The workload covers 17 cases across:

  • dependent versus independent integer operation chains;
  • predictable and deterministic pseudo-random conditional branches;
  • one-target versus sixteen-target indirect calls;
  • dependent pointer chasing at 8 KiB, 256 KiB, and 16 MiB;
  • aligned versus 128-byte-boundary-crossing 16-byte loads;
  • exact versus partially overlapping store-to-load forwarding;
  • 4 KiB, 64 KiB, and 256 KiB generated guest-code footprints; and
  • repeated RX -> RW -> RX JIT publication with FlushInstructionCache.

The Windows executable only uses public Win32 APIs and does not call private Wine, winemac, or xtajit64 entry points, so the same binary can compare two runtime trees.

A macOS runner records the physical host signature, chip, macOS build, power/thermal state, runtime-manifest digest, process timing, context switches, and repeated benchmark output. A separate Python comparator validates log completeness and host/configuration equality, aggregates the median run p50/p95, supports text/Markdown/JSON output, and only applies a regression threshold when explicitly requested.

No chip-specific latency tables, private PMU encodings, or universal M-series thresholds are copied into the repository.

Validation

  • Cross-compiled the benchmark with x86_64-w64-mingw32-gcc -O2 under -Wall -Wextra -Werror -Wconversion -Wshadow.
  • Inspected the generated x86-64 disassembly for the intended conditional branch, indirect call, and unaligned vector-load forms.
  • Ran bash -n on the runner.
  • Ran Python bytecode compilation on the comparator.
  • Exercised the comparator with valid baseline/candidate logs, Markdown and JSON output, an expected regression-threshold failure, and an expected host-mismatch rejection.
  • Ran git diff --check and ./switchyard/verify_source.sh in a clean public-source checkout with the proposed files applied.

Hardware validation boundary

A physical Apple Silicon Switchyard native-ARM64 runtime was not available in the execution environment used to author this PR. The PR therefore does not claim M-series performance numbers or a runtime speedup. Before marking this ready, run the documented baseline/candidate procedure on the same Mac and inspect any material delta with Instruments.

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