changes from Rel-2-BETA-WW05-15 since R1

Documentation/DocBook/media_api.tmpl

@@ -1,6 +1,6 @@
 <?xml version="1.0"?>
-<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.2//EN"
-	"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd" [
+<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
+	"http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" [
 <!ENTITY % media-entities SYSTEM "./media-entities.tmpl"> %media-entities;
 <!ENTITY media-indices SYSTEM "./media-indices.tmpl">
 

Documentation/hwmon/k10temp

@@ -12,7 +12,6 @@ Supported chips:
 * AMD Family 12h processors: "Llano" (E2/A4/A6/A8-Series)
 * AMD Family 14h processors: "Brazos" (C/E/G/Z-Series)
 * AMD Family 15h processors: "Bulldozer" (FX-Series), "Trinity"
-* AMD Family 16h processors: "Kabini"
 
   Prefix: 'k10temp'
   Addresses scanned: PCI space

Makefile

@@ -1,6 +1,6 @@
 VERSION = 3
 PATCHLEVEL = 10
-SUBLEVEL = 17
+SUBLEVEL = 9
 EXTRAVERSION =
 NAME = TOSSUG Baby Fish
 
@@ -406,7 +406,7 @@ export MODVERDIR := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/).tmp_ve
 # Files to ignore in find ... statements
 
 RCS_FIND_IGNORE := \( -name SCCS -o -name BitKeeper -o -name .svn -o -name CVS \
-		   -o -name .pc -o -name .hg -o -name .git -o -name meta \) -prune -o
+		   -o -name .pc -o -name .hg -o -name .git \) -prune -o
 export RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn \
 			 --exclude CVS --exclude .pc --exclude .hg --exclude .git
 

arch/arc/include/asm/delay.h

@@ -53,10 +53,11 @@ static inline void __udelay(unsigned long usecs)
 {
 	unsigned long loops;
 
-	/* (u64) cast ensures 64 bit MPY - real or emulated
+	/* (long long) cast ensures 64 bit MPY - real or emulated
 	 * HZ * 4295 is pre-evaluated by gcc - hence only 2 mpy ops
 	 */
-	loops = ((u64) usecs * 4295 * HZ * loops_per_jiffy) >> 32;
+	loops = ((long long)(usecs * 4295 * HZ) *
+		 (long long)(loops_per_jiffy)) >> 32;
 
 	__delay(loops);
 }

arch/arc/include/asm/ptrace.h

@@ -52,14 +52,12 @@ struct pt_regs {
 
 	/*to distinguish bet excp, syscall, irq */
 	union {
-		struct {
 #ifdef CONFIG_CPU_BIG_ENDIAN
 		/* so that assembly code is same for LE/BE */
 		unsigned long orig_r8:16, event:16;
 #else
 		unsigned long event:16, orig_r8:16;
 #endif
-		};
 		long orig_r8_word;
 	};
 };

arch/arc/include/asm/sections.h

@@ -11,6 +11,7 @@
 
 #include <asm-generic/sections.h>
 
+extern char _int_vec_base_lds[];
 extern char __arc_dccm_base[];
 extern char __dtb_start[];
 

arch/arc/include/asm/spinlock.h

@@ -45,14 +45,7 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
 
 static inline void arch_spin_unlock(arch_spinlock_t *lock)
 {
-	unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__;
-
-	__asm__ __volatile__(
-	"	ex  %0, [%1]		\n"
-	: "+r" (tmp)
-	: "r"(&(lock->slock))
-	: "memory");
-
+	lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
 	smp_mb();
 }
 

arch/arc/include/asm/syscall.h

@@ -18,15 +18,16 @@ static inline long
 syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
 {
 	if (user_mode(regs) && in_syscall(regs))
-		return regs->r8;
+		return regs->orig_r8;
 	else
 		return -1;
 }
 
 static inline void
 syscall_rollback(struct task_struct *task, struct pt_regs *regs)
 {
-	regs->r0 = regs->orig_r0;
+	/* XXX: I can't fathom how pt_regs->r8 will be clobbered ? */
+	regs->r8 = regs->orig_r8;
 }
 
 static inline long

arch/arc/include/asm/uaccess.h

@@ -43,7 +43,7 @@
  * Because it essentially checks if buffer end is within limit and @len is
  * non-ngeative, which implies that buffer start will be within limit too.
  *
- * The reason for rewriting being, for majority of cases, @len is generally
+ * The reason for rewriting being, for majorit yof cases, @len is generally
  * compile time constant, causing first sub-expression to be compile time
  * subsumed.
  *
@@ -53,7 +53,7 @@
  *
  */
 #define __user_ok(addr, sz)	(((sz) <= TASK_SIZE) && \
-				 ((addr) <= (get_fs() - (sz))))
+				 (((addr)+(sz)) <= get_fs()))
 #define __access_ok(addr, sz)	(unlikely(__kernel_ok) || \
 				 likely(__user_ok((addr), (sz))))
 

arch/arc/kernel/entry.S

@@ -498,7 +498,7 @@ tracesys_exit:
 trap_with_param:
 
 	; stop_pc info by gdb needs this info
-	st  orig_r8_IS_BRKPT, [sp, PT_orig_r8]
+	stw orig_r8_IS_BRKPT, [sp, PT_orig_r8]
 
 	mov r0, r12
 	lr  r1, [efa]
@@ -723,7 +723,7 @@ not_exception:
 	; things to what they were, before returning from L2 context
 	;----------------------------------------------------------------
 
-	ld   r9, [sp, PT_orig_r8]      ; get orig_r8 to make sure it is
+	ldw  r9, [sp, PT_orig_r8]      ; get orig_r8 to make sure it is
 	brne r9, orig_r8_IS_IRQ2, 149f ; infact a L2 ISR ret path
 
 	ld r9, [sp, PT_status32]       ; get statu32_l2 (saved in pt_regs)

arch/arc/kernel/head.S

@@ -27,16 +27,11 @@ stext:
 	; Don't clobber r0-r4 yet. It might have bootloader provided info
 	;-------------------------------------------------------------------
 
-	sr	@_int_vec_base_lds, [AUX_INTR_VEC_BASE]
-
 #ifdef CONFIG_SMP
 	; Only Boot (Master) proceeds. Others wait in platform dependent way
 	;	IDENTITY Reg [ 3  2  1  0 ]
 	;	(cpu-id)             ^^^	=> Zero for UP ARC700
 	;					=> #Core-ID if SMP (Master 0)
-	; Note that non-boot CPUs might not land here if halt-on-reset and
-	; instead breath life from @first_lines_of_secondary, but we still
-	; need to make sure only boot cpu takes this path.
 	GET_CPU_ID  r5
 	cmp	r5, 0
 	jnz	arc_platform_smp_wait_to_boot
@@ -101,8 +96,6 @@ stext:
 
 first_lines_of_secondary:
 
-	sr	@_int_vec_base_lds, [AUX_INTR_VEC_BASE]
-
 	; setup per-cpu idle task as "current" on this CPU
 	ld	r0, [@secondary_idle_tsk]
 	SET_CURR_TASK_ON_CPU  r0, r1

arch/arc/kernel/irq.c

@@ -24,13 +24,16 @@
  * -Needed for each CPU (hence not foldable into init_IRQ)
  *
  * what it does ?
+ * -setup Vector Table Base Reg - in case Linux not linked at 0x8000_0000
  * -Disable all IRQs (on CPU side)
  * -Optionally, setup the High priority Interrupts as Level 2 IRQs
  */
 void __cpuinit arc_init_IRQ(void)
 {
 	int level_mask = 0;
 
+	write_aux_reg(AUX_INTR_VEC_BASE, _int_vec_base_lds);
+
 	/* Disable all IRQs: enable them as devices request */
 	write_aux_reg(AUX_IENABLE, 0);
 

arch/arc/kernel/ptrace.c

@@ -92,7 +92,7 @@ static int genregs_set(struct task_struct *target,
 	REG_IN_CHUNK(scratch, callee, ptregs);	/* pt_regs[bta..orig_r8] */
 	REG_IN_CHUNK(callee, efa, cregs);	/* callee_regs[r25..r13] */
 	REG_IGNORE_ONE(efa);			/* efa update invalid */
-	REG_IGNORE_ONE(stop_pc);			/* PC updated via @ret */
+	REG_IN_ONE(stop_pc, &ptregs->ret);	/* stop_pc: PC update */
 
 	return ret;
 }

arch/arc/kernel/setup.c

@@ -47,7 +47,10 @@ void __cpuinit read_arc_build_cfg_regs(void)
 	READ_BCR(AUX_IDENTITY, cpu->core);
 
 	cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR);
+
 	cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
+	if (cpu->vec_base == 0)
+		cpu->vec_base = (unsigned int)_int_vec_base_lds;
 
 	READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
 	cpu->uncached_base = uncached_space.start << 24;

arch/arc/kernel/signal.c

@@ -101,6 +101,7 @@ SYSCALL_DEFINE0(rt_sigreturn)
 {
 	struct rt_sigframe __user *sf;
 	unsigned int magic;
+	int err;
 	struct pt_regs *regs = current_pt_regs();
 
 	/* Always make any pending restarted system calls return -EINTR */
@@ -118,16 +119,15 @@ SYSCALL_DEFINE0(rt_sigreturn)
 	if (!access_ok(VERIFY_READ, sf, sizeof(*sf)))
 		goto badframe;
 
-	if (__get_user(magic, &sf->sigret_magic))
+	err = restore_usr_regs(regs, sf);
+	err |= __get_user(magic, &sf->sigret_magic);
+	if (err)
 		goto badframe;
 
 	if (unlikely(is_do_ss_needed(magic)))
 		if (restore_altstack(&sf->uc.uc_stack))
 			goto badframe;
 
-	if (restore_usr_regs(regs, sf))
-		goto badframe;
-
 	/* Don't restart from sigreturn */
 	syscall_wont_restart(regs);
 
@@ -190,15 +190,6 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info,
 	if (!sf)
 		return 1;
 
-	/*
-	 * w/o SA_SIGINFO, struct ucontext is partially populated (only
-	 * uc_mcontext/uc_sigmask) for kernel's normal user state preservation
-	 * during signal handler execution. This works for SA_SIGINFO as well
-	 * although the semantics are now overloaded (the same reg state can be
-	 * inspected by userland: but are they allowed to fiddle with it ?
-	 */
-	err |= stash_usr_regs(sf, regs, set);
-
 	/*
 	 * SA_SIGINFO requires 3 args to signal handler:
 	 *  #1: sig-no (common to any handler)
@@ -222,6 +213,14 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info,
 		magic = MAGIC_SIGALTSTK;
 	}
 
+	/*
+	 * w/o SA_SIGINFO, struct ucontext is partially populated (only
+	 * uc_mcontext/uc_sigmask) for kernel's normal user state preservation
+	 * during signal handler execution. This works for SA_SIGINFO as well
+	 * although the semantics are now overloaded (the same reg state can be
+	 * inspected by userland: but are they allowed to fiddle with it ?
+	 */
+	err |= stash_usr_regs(sf, regs, set);
 	err |= __put_user(magic, &sf->sigret_magic);
 	if (err)
 		return err;

arch/arc/kernel/unaligned.c

@@ -233,12 +233,6 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs,
 		regs->status32 &= ~STATUS_DE_MASK;
 	} else {
 		regs->ret += state.instr_len;
-
-		/* handle zero-overhead-loop */
-		if ((regs->ret == regs->lp_end) && (regs->lp_count)) {
-			regs->ret = regs->lp_start;
-			regs->lp_count--;
-		}
 	}
 
 	return 0;

arch/arc/lib/strchr-700.S

@@ -39,18 +39,9 @@ ARC_ENTRY strchr
 	ld.a	r2,[r0,4]
 	sub	r12,r6,r7
 	bic	r12,r12,r6
-#ifdef __LITTLE_ENDIAN__
 	and	r7,r12,r4
 	breq	r7,0,.Loop ; For speed, we want this branch to be unaligned.
 	b	.Lfound_char ; Likewise this one.
-#else
-	and	r12,r12,r4
-	breq	r12,0,.Loop ; For speed, we want this branch to be unaligned.
-	lsr_s	r12,r12,7
-	bic 	r2,r7,r6
-	b.d	.Lfound_char_b
-	and_s	r2,r2,r12
-#endif
 ; /* We require this code address to be unaligned for speed...  */
 .Laligned:
 	ld_s	r2,[r0]
@@ -104,7 +95,6 @@ ARC_ENTRY strchr
 	lsr	r7,r7,7
 
 	bic	r2,r7,r6
-.Lfound_char_b:
 	norm	r2,r2
 	sub_s	r0,r0,4
 	asr_s	r2,r2,3

arch/arm/Makefile

@@ -283,9 +283,6 @@ archprepare:
 # Convert bzImage to zImage
 bzImage: zImage
 
-# These targets cannot be built in parallel
-.NOTPARALLEL: zImage Image xipImage bootpImage uImage
-
 zImage Image xipImage bootpImage uImage: vmlinux
 	$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
 

arch/arm/boot/dts/at91rm9200.dtsi

@@ -35,12 +35,8 @@
 		ssc2 = &ssc2;
 	};
 	cpus {
-		#address-cells = <0>;
-		#size-cells = <0>;
-
-		cpu {
+		cpu@0 {
 			compatible = "arm,arm920t";
-			device_type = "cpu";
 		};
 	};
 

arch/arm/boot/dts/at91sam9260.dtsi

@@ -32,12 +32,8 @@
 		ssc0 = &ssc0;
 	};
 	cpus {
-		#address-cells = <0>;
-		#size-cells = <0>;
-
-		cpu {
-			compatible = "arm,arm926ej-s";
-			device_type = "cpu";
+		cpu@0 {
+			compatible = "arm,arm926ejs";
 		};
 	};
 
@@ -344,14 +340,6 @@
 					};
 				};
 
-				i2c_gpio0 {
-					pinctrl_i2c_gpio0: i2c_gpio0-0 {
-						atmel,pins =
-							<0 23 0x0 0x3   /* PA23 gpio I2C_SDA pin */
-							 0 24 0x0 0x3>; /* PA24 gpio I2C_SCL pin */
-					};
-				};
-
 				pioA: gpio@fffff400 {
 					compatible = "atmel,at91rm9200-gpio";
 					reg = <0xfffff400 0x200>;
@@ -604,8 +592,6 @@
 		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
 		#address-cells = <1>;
 		#size-cells = <0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_i2c_gpio0>;
 		status = "disabled";
 	};
 };

arch/arm/boot/dts/at91sam9263.dtsi

@@ -29,12 +29,8 @@
 		ssc1 = &ssc1;
 	};
 	cpus {
-		#address-cells = <0>;
-		#size-cells = <0>;
-
-		cpu {
-			compatible = "arm,arm926ej-s";
-			device_type = "cpu";
+		cpu@0 {
+			compatible = "arm,arm926ejs";
 		};
 	};
 

arch/arm/boot/dts/at91sam9g45.dtsi

@@ -35,12 +35,8 @@
 		ssc1 = &ssc1;
 	};
 	cpus {
-		#address-cells = <0>;
-		#size-cells = <0>;
-
-		cpu {
-			compatible = "arm,arm926ej-s";
-			device_type = "cpu";
+		cpu@0 {
+			compatible = "arm,arm926ejs";
 		};
 	};