perf: publish U5 FPGA loopback throughput evidence - #15
ichigo-6301 wants to merge 2 commits into
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Publish one debugger-captured 1024-frame U5 loopback observation with fixed source, artifact, counter, and claim boundaries.
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@codex review Please review the bounded U5 FPGA evidence publication at |
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Reviewed commit: 8dbaf7672e
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Merge the reviewed base-owned policy from main and correct PR #15 to publish only an operator-transcribed single-run observation with a post-start-write-return completion window.
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@codex review Please review corrected head |
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Codex Review: Didn't find any major issues. 🚀 Reviewed commit: ℹ️ About Codex in GitHubYour team has set up Codex to review pull requests in this repo. Reviews are triggered when you
If Codex has suggestions, it will comment; otherwise it will react with 👍. Codex can also answer questions or update the PR. Try commenting "@codex address that feedback". |
Summary
DecimalObservation
COUNTS_PER_SECOND=333333343Evidence Boundary
Classification:
FPGA_DEBUGGER_TRANSCRIBED_SINGLE_RUN.The raw debugger fields were transcribed after the timing and correctness gates. No independent screenshot, debugger session export, or memory dump was retained. The public
helloworld.cis a fixed source-only reproduction reference; the retained private ELF and bitstream are identified by size and SHA-256, but no retained build manifest cryptographically links those binaries to the public source.The timer starts after the descriptor-start register write returns. The metric is therefore a post-start-write-return completion-window payload rate, not launch-to-completion hardware end-to-end throughput.
Review Fixes
debugger_capture_transcript.txtfpga/u5/benchmarkexceptionValidation
make showcase-check: 337 tests passed, 1 expected skipFPGA_EMULATION_EVIDENCE_PASSv0.1.0-rc1: unchanged and passgit diff --check: pass7d20a9e996d246dcff43a0397308991f02431a86Nonclaims
Scope