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[herd] Load-Reserve Store-Conditional may pair on different addresses - #1896

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[herd] Load-Reserve Store-Conditional may pair on different addresses#1896
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@maranget

@maranget maranget commented Jul 3, 2026

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The following test may succeed on hardware and is legal.

AArch64 L020
(* Observed on many systems with `-mode presi` or `-s 4` *)
{
 0:X0=x; 0:X2=y;
}
 P0              ;
 LDXR W1,[X0]    ;
 MOV W3,#1       ;
 STXR W4,W3,[X2] ;
exists([y]=1)

Have herd7 to perform store-exclusive even when the reserved address is different. In practive we encode the absence of a reservation with the ResAddr (or RES) register holding zero. Hence the store exclusive may succeeed whenever ResAddr does not hold zero. Further notice that executing a store exclusive instruction voids the reservation, regardless of the write being performed or not.

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maranget force-pushed the lxsx-diff branch 3 times, most recently from 3fee515 to 4e75239 Compare July 3, 2026 10:34

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Overall looks good to me but I have a couple of comments about the tests.

Comment thread herd/tests/instructions/AArch64/L106.litmus
Comment thread herd/tests/instructions/AArch64/L020.litmus Outdated
@maranget

maranget commented Jul 6, 2026

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Hi @relokin. What this PR basically does is changing the test that controls performing the store conditional.

First observe that the reservation (a.k.a exclusive monitor) is implemented by using a unique register RES (for AArch64, VMSA and ASL. VMSA+ASL uses an additional flag). Schematic behaviour is a follows

  1. Initially this register holds the null pointer (i.e. 0).
  2. LDXR sets RES to its effective address.
  3. STRX perform a check on RES : (a) old check compare STXR effective address with RES; or (b) new check , checks that the contents of RES is different from null. Perform store when the check passes. Always reset RES to null.

See also the tests L020 (LDXR and STXR to different addresses, store was always failing now it may succeed) and L021 (LDXR followed by two STXR, all to the same address, the second STXR never succeeds).

Finally an new test L106 consists in a simple STXR, without LDXR, the store normally always fails but may succeed when -variant ConstrainedUnredictable is specified.

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maranget force-pushed the lxsx-diff branch 2 times, most recently from 832dc8d to eaecbf6 Compare July 6, 2026 12:58
@maranget

maranget commented Jul 6, 2026

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I have also added L107 (L021 with -variant CU). The current implementation of this PR can perform the second STXR. I am not sure at all that the result is correct, as the description of the local monitor does suggest that this variant have no impact on the local monitor being cleared (here).

AArch64 L107
(* Can the second STXR succeed? *)
Variant=CU
{
int x=1;
0:X0=x;
}
 P0               ;
 MOV W3,#2        ;
 MOV W5,#3        ;
 LDXR W1,[X0]     ;
 STXR W4,W3,[X0]  ;
 STXR W6,W5,[X0]  ;
exists 0:X4=1 /\ 0:X6=0 /\ x=3

@relokin

relokin commented Jul 7, 2026

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Looks good to me. Perhaps one concern I have is that for AArch64 -variant CU is not modelling any architecturally valid behaviours. In other words, it shouldn't be used by most users.

@maranget

maranget commented Jul 7, 2026

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Looks good to me. Perhaps one concern I have is that for AArch64 -variant CU is not modelling any architecturally valid behaviours. In other words, it shouldn't be used by most users.

Thanks @relokin. I'll delay considering merging until PR #1889 is merged.

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Hi @relokin and @HadrienRenaud. Rebased on master since prerequisite PR #1889 is merged, all commits squashed into two commits, ready for review.

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This looks ok to me but I think the handling of reserved addresses in ASL could be cleaner.

Comment thread herd/AArch64ASLSem.ml
Comment thread herd/libdir/asl-pseudocode/physmem-std.asl Outdated
Comment thread herd/libdir/asl-pseudocode/physmem-vmsa.asl Outdated
@relokin

relokin commented Jul 10, 2026

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Not really the point of this PR so you can go ahead and merge as soon as @HadrienRenaud is happy but I don't understand why we support -variant cu in AArch64. -variant cu models behaviours which are architecturally forbidden. If the point of -variant cu is to enable forbidden behaviours then I think we need to change the name of this variant. CONSTRAINED UNPREDICTABLE has a specific meaning for the AArch64 architecture and the behavious of -variant cu are not CONSTRAINED UNPREDICTABLE. Perhaps these should have been behaviours one would expect from -through all?

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I do not understand the intent of -variant CU. I'd gladly keep it out of LR/SC if you think this is the thing to do. As far as I remember, some usage of this variant in mixed-size mode was less problematic.

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some usage of this variant in mixed-size mode was less problematic.

My bad, this usage is for generators... Hence we can suppress -variant CU in herd7, having STXR to succeed whatever the context is being the only occurrence of this variant.

maranget added a commit that referenced this pull request Jul 31, 2026
The purpose of this variant was unclear. In practice
it was permitting issuing invalid behaviours architecturally speaking.
(see #1896 (comment))
We this supressit it as a prelude to PR #1896.
maranget added a commit that referenced this pull request Jul 31, 2026
The purpose of this variant was unclear. In practice
it was permitting issuing invalid behaviours architecturally speaking.
(see #1896 (comment))
We this supressit it as a prelude to PR #1896.
maranget added a commit that referenced this pull request Jul 31, 2026
The purpose of this variant was unclear. In practice
it was permitting issuing invalid behaviours architecturally speaking.
(see #1896 (comment))
We thus supress it as a prelude to PR #1896.
maranget added 2 commits July 31, 2026 16:44
Given x and y that are different addresses `LDXR x; ...; STXR y`,
STXR to y can succeed.

Hence, the only situation when STXR always fail is
when there is no reservation, which we implement by the reservation
address being null.

Detailed changes:
 + The new semantics is also implemented for AArch64 ASL and ASL+VMSA
   modes
 + With `-variant ConstrainedUnpredictable`, STXR can succeed even in
   the absence of a reservation (non-ASL only, no access to variant in ASL).
 + Same semantics of LR/SC pairs for RISCV
   Notice that this semantics (SC can succeed event with a reservation
   to a different address) was activated by the  variant `LrScDiffOk`.
   This behaviour now being the default, we suppress the variant.
 + Add constrained unpredictable tests
   Note that these tests are disabled in ASL mode.
   (No access to the ConstrainedUnpredicable variant)

 + Add "LDXR x; LDXR y, STXR x" tests.
@maranget maranget changed the title [herd] Load-reserve Store-Conditional may pair on different addresses [herd] Load-Reserve Store-Conditional may pair on different addresses Jul 31, 2026
Comment thread herd/AArch64ASLSem.ml
ASLS.A.state_add st (ASLS.A.Location_reg (ii.A.proc, loc)) v
in
let add_reg_if_present reg loc st =
let add_reg_if_present ?(setzero=false) reg loc st =

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I believe this is not necessary anymore? I don't think add_reg_if_present is called with setzero?

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3 participants