simd: Use __riscv_vsetvl_eXXm1 function to get the actual width of RVV instructions - #10310
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…V instructions This is because RVV instructions are truely hardware dependent. So, we need to obtain the actual width with the specific instriction of RVV extentions. Signed-off-by: Hiroshi Hatake <hiroshi@chronosphere.io>
cosmo0920
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edsiper,
fujimotos,
koleini and
leonardo-albertovich
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May 8, 2025 09:11
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@edsiper shouldn't we move the simd stuff to cfl while it's still small so we can use it in other places in the future? |
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This is because RVV instructions are truely hardware dependent. So, we need to obtain the actual width with the specific instriction of RVV extentions.
We use 1 segment of 8 or 32 elements of RVV or other SIMD instructions.
So, in RVV, we need to obtain the actual size of VLEN on the RISC-V CPU.
This could be enabled with the following instructions:
Note that the current implementation is also good but it is only effective for VLEN = 128 environments.
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