Fix MIPS lifter bugs: overflow detection and MSUB/MSUBU subtraction order#126
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Fix tests asserting wrong behavior per MIPS32 manual: - ADD: -1 + 1 = 0 is not overflow, add MIN_INT + (-1) overflow case - SUB: 0 - 1 = -1 is not overflow, add MAX_INT - (-1) overflow case - MSUB/MSUBU: fix reversed subtraction (manual: accumulator - product) Add edge cases to existing tests: - CLZ(0)=32, CLO(0xFFFFFFFF)=32, DIV neg/neg, SRA shift-31 - BGEZAL/BLTZAL: assert $ra written unconditionally Add new test functions: - TEQ, LL, SC, RDHWR, PREF, SYNC, ADDIU negative imm, SLTIU negative imm Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
…ction order - ADD/ADDI: Overflow check compared result sign to lhs sign only, which falsely triggered on e.g. -1 + 1 = 0. Now uses manual-specified 33-bit check: sign-extend to 64 bits, add, overflow if bit32 != bit31. - SUB: Overflow used incorrect cmpltu formula. Now uses same 33-bit approach as ADD but with subtraction. - MSUB/MSUBU: Computed product - accumulator instead of manual-specified accumulator - product. Swapped operand order. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
- actions/checkout@v2 → v4 - actions-rs/toolchain@v1 → dtolnay/rust-toolchain@stable - actions-rs/cargo@v1 → direct cargo commands - Consolidate rustfmt + clippy components in single toolchain step Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Summary
product - accumulator, manual specifiesaccumulator - productTest plan
cargo test --lib translator::mips::test)🤖 Generated with Claude Code