CI: de-duplicate, refactor - #6199
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/hil full |
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Triggered full HIL run for #6199. Run: https://github.com/esp-rs/esp-hal/actions/runs/32847211676 Status update: HIL (full) run is still in progress or status unknown. |
bugadani
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Aug 25, 2026
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| ALL_CHIPS='[ | ||
| {"soc":"esp32", "rust-target":"xtensa-esp32-none-elf", "runner":"esp32-jtag", "host":"aarch64"}, | ||
| {"soc":"esp32s2", "rust-target":"xtensa-esp32s2-none-elf", "runner":"esp32s2-jtag", "host":"aarch64"}, | ||
| {"soc":"esp32s3", "rust-target":"xtensa-esp32s3-none-elf", "runner":"esp32s3-usb", "host":"aarch64"}, | ||
| {"soc":"esp32c2", "rust-target":"riscv32imc-unknown-none-elf", "runner":"esp32c2-jtag", "host":"aarch64"}, | ||
| {"soc":"esp32c3", "rust-target":"riscv32imc-unknown-none-elf", "runner":"esp32c3-usb", "host":"aarch64"}, | ||
| {"soc":"esp32c5", "rust-target":"riscv32imac-unknown-none-elf", "runner":"esp32c5-usb", "host":"aarch64"}, | ||
| {"soc":"esp32c6", "rust-target":"riscv32imac-unknown-none-elf", "runner":"esp32c6-usb", "host":"aarch64"}, | ||
| {"soc":"esp32c61","rust-target":"riscv32imac-unknown-none-elf", "runner":"esp32c61-usb", "host":"aarch64"}, | ||
| {"soc":"esp32h2", "rust-target":"riscv32imac-unknown-none-elf", "runner":"esp32h2-usb", "host":"aarch64"}, | ||
| {"soc":"esp32p4", "rust-target":"riscv32imafc-unknown-none-elf","runner":"esp32p4", "host":"aarch64"}, | ||
| {"soc":"esp32s31","rust-target":"riscv32imafc-unknown-none-elf","runner":"esp32s31-jtag", "host":"aarch64"} |
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Can we merge this with chips.json?
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+1 would be really good if we only had one place to configure the chips
there is also that "grouping" in ci.yml
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De-duplicate CI/HIL setup. Quite a lot going on here, mainly:
.github/chips.jsonandsetup-toolchains.hil.ymlis now a reusable workflow.ci.ymlcalls it instead of duplication./hilpaths share one dispatch job.esp-halrust-version(noMSRVenv inci.yml).merge_group.I did initial testing in JurajSadel#48
closes #5275