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581 changes: 274 additions & 307 deletions esp-hal/src/ledc/channel.rs

Large diffs are not rendered by default.

21 changes: 12 additions & 9 deletions esp-hal/src/ledc/low_level/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,22 +3,25 @@
#[cfg_attr(ledc_version = "3", path = "v3.rs")]
mod version;

#[cfg(ledc_version = "1")]
use super::timer::HSClockSource;
use super::{
LSGlobalClkSource,
LowSpeedGlobalClockSource,
channel::Number as ChannelNumber,
timer::{LSClockSource, Number as TimerNumber},
timer::Number as TimerNumber,
};
use crate::{gpio::OutputSignal, pac::ledc::RegisterBlock, time::Rate};
use crate::{gpio::OutputSignal, ledc::timer::ClockSource, pac::ledc::RegisterBlock, time::Rate};

#[inline(always)]
pub(super) fn set_global_slow_clock(ledc: &RegisterBlock, clock_source: LSGlobalClkSource) {
pub(super) fn set_global_slow_clock(ledc: &RegisterBlock, clock_source: LowSpeedGlobalClockSource) {
version::set_global_slow_clock(ledc, clock_source)
}

#[inline(always)]
pub(super) fn ls_freq_hw(clock_source: LSClockSource) -> Rate {
pub(super) fn get_duty_res(ledc: &RegisterBlock, number: TimerNumber, is_hs: bool) -> u8 {
version::get_duty_res(ledc, number, is_hs)
}

#[inline(always)]
pub(super) fn ls_freq_hw(clock_source: ClockSource) -> Rate {
version::ls_freq_hw(clock_source)
}

Expand All @@ -40,7 +43,7 @@ pub(super) fn ls_update_hw(ledc: &RegisterBlock, number: TimerNumber) {

#[cfg(ledc_version = "1")]
#[inline(always)]
pub(super) fn hs_freq_hw(clock_source: HSClockSource) -> Rate {
pub(super) fn hs_freq_hw(clock_source: ClockSource) -> Rate {
version::hs_freq_hw(clock_source)
}

Expand All @@ -51,7 +54,7 @@ pub(super) fn hs_configure_hw(
number: TimerNumber,
divisor: u32,
duty: u8,
clock_source: HSClockSource,
clock_source: ClockSource,
) {
version::hs_configure_hw(ledc, number, divisor, duty, clock_source)
}
Expand Down
40 changes: 31 additions & 9 deletions esp-hal/src/ledc/low_level/v1.rs
Original file line number Diff line number Diff line change
@@ -1,20 +1,42 @@
use super::super::{
LSGlobalClkSource,
LowSpeedGlobalClockSource,
channel::Number as ChannelNumber,
timer::{HSClockSource, LSClockSource, Number as TimerNumber},
timer::Number as TimerNumber,
};
use crate::{
gpio::OutputSignal,
ledc::timer::ClockSource,
pac::ledc::RegisterBlock,
soc::clocks,
time::Rate,
};
use crate::{gpio::OutputSignal, pac::ledc::RegisterBlock, soc::clocks, time::Rate};

pub(super) fn set_global_slow_clock(ledc: &RegisterBlock, clock_source: LSGlobalClkSource) {
pub(super) fn set_global_slow_clock(ledc: &RegisterBlock, clock_source: LowSpeedGlobalClockSource) {
match clock_source {
LSGlobalClkSource::APBClk => {
LowSpeedGlobalClockSource::APBClock => {
ledc.conf().write(|w| w.apb_clk_sel().set_bit());
}
}
ledc.lstimer(0).conf().modify(|_, w| w.para_up().set_bit());
}

pub(super) fn ls_freq_hw(_clock_source: LSClockSource) -> Rate {
pub(super) fn get_duty_res(ledc: &RegisterBlock, number: TimerNumber, is_hs: bool) -> u8 {
if is_hs {
ledc.hstimer(number as usize)
.conf()
.read()
.duty_res()
.bits()
} else {
ledc.lstimer(number as usize)
.conf()
.read()
.duty_res()
.bits()
}
}

pub(super) fn ls_freq_hw(_clock_source: ClockSource) -> Rate {
Rate::from_hz(clocks::apb_clk_frequency())
}

Expand All @@ -41,7 +63,7 @@ pub(super) fn ls_update_hw(ledc: &RegisterBlock, number: TimerNumber) {
.modify(|_, w| w.para_up().set_bit());
}

pub(super) fn hs_freq_hw(_clock_source: HSClockSource) -> Rate {
pub(super) fn hs_freq_hw(_clock_source: ClockSource) -> Rate {
Rate::from_hz(clocks::apb_clk_frequency())
}

Expand All @@ -50,9 +72,9 @@ pub(super) fn hs_configure_hw(
number: TimerNumber,
divisor: u32,
duty: u8,
clock_source: HSClockSource,
clock_source: ClockSource,
) {
let sel_hstimer = clock_source == HSClockSource::APBClk;
let sel_hstimer = clock_source == ClockSource::APBClock;
ledc.hstimer(number as usize).conf().modify(|_, w| unsafe {
w.tick_sel().bit(sel_hstimer);
w.rst().clear_bit();
Expand Down
31 changes: 21 additions & 10 deletions esp-hal/src/ledc/low_level/v2.rs
Original file line number Diff line number Diff line change
@@ -1,20 +1,30 @@
use super::super::{
LSGlobalClkSource,
LowSpeedGlobalClockSource,
channel::Number as ChannelNumber,
timer::{LSClockSource, Number as TimerNumber},
timer::Number as TimerNumber,
};
use crate::{
gpio::OutputSignal,
ledc::timer::ClockSource,
pac::ledc::RegisterBlock,
soc::clocks,
time::Rate,
};
use crate::{gpio::OutputSignal, pac::ledc::RegisterBlock, soc::clocks, time::Rate};

pub(super) fn set_global_slow_clock(ledc: &RegisterBlock, clock_source: LSGlobalClkSource) {
pub(super) fn set_global_slow_clock(ledc: &RegisterBlock, clock_source: LowSpeedGlobalClockSource) {
match clock_source {
LSGlobalClkSource::APBClk => {
LowSpeedGlobalClockSource::APBClock => {
ledc.conf().write(|w| unsafe { w.apb_clk_sel().bits(1) });
}
}
ledc.timer(0).conf().modify(|_, w| w.para_up().set_bit());
}

pub(super) fn ls_freq_hw(_clock_source: LSClockSource) -> Rate {
pub(super) fn get_duty_res(ledc: &RegisterBlock, number: TimerNumber, _is_hs: bool) -> u8 {
ledc.timer(number as usize).conf().read().duty_res().bits()
}

pub(super) fn ls_freq_hw(_clock_source: ClockSource) -> Rate {
Rate::from_hz(clocks::apb_clk_frequency())
}

Expand All @@ -26,10 +36,11 @@ pub(super) fn ls_configure_hw(
use_ref_tick: bool,
) {
ledc.timer(number as usize).conf().modify(|_, w| unsafe {
#[cfg(soc_has_clock_node_ref_tick)]
w.tick_sel().bit(use_ref_tick);
#[cfg(not(soc_has_clock_node_ref_tick))]
let _ = use_ref_tick;
if cfg!(soc_has_clock_node_ref_tick) {
w.tick_sel().bit(use_ref_tick);
} else {
let _ = use_ref_tick;
}
w.rst().clear_bit();
w.pause().clear_bit();
w.clk_div().bits(divisor);
Expand Down
29 changes: 18 additions & 11 deletions esp-hal/src/ledc/low_level/v3.rs
Original file line number Diff line number Diff line change
@@ -1,27 +1,34 @@
use super::super::{
LSGlobalClkSource,
LowSpeedGlobalClockSource,
channel::Number as ChannelNumber,
timer::{LSClockSource, Number as TimerNumber},
timer::Number as TimerNumber,
};
use crate::{
gpio::OutputSignal,
ledc::timer::ClockSource,
pac::ledc::RegisterBlock,
soc::clocks,
time::Rate,
};
use crate::{gpio::OutputSignal, pac::ledc::RegisterBlock, soc::clocks, time::Rate};

pub(super) fn set_global_slow_clock(ledc: &RegisterBlock, clock_source: LSGlobalClkSource) {
pub(super) fn set_global_slow_clock(ledc: &RegisterBlock, clock_source: LowSpeedGlobalClockSource) {
let pcr = unsafe { &*crate::peripherals::PCR::ptr() };
pcr.ledc_sclk_conf().write(|w| w.ledc_sclk_en().set_bit());
match clock_source {
LSGlobalClkSource::APBClk => {
#[cfg(esp32c6)]
pcr.ledc_sclk_conf()
.write(|w| unsafe { w.ledc_sclk_sel().bits(1) });
#[cfg(esp32h2)]
LowSpeedGlobalClockSource::APBClock => {
let sel = if cfg!(esp32c6) { 1 } else { 0 };
pcr.ledc_sclk_conf()
.write(|w| unsafe { w.ledc_sclk_sel().bits(0) });
.write(|w| unsafe { w.ledc_sclk_sel().bits(sel) });
}
}
ledc.timer(0).conf().modify(|_, w| w.para_up().set_bit());
}

pub(super) fn ls_freq_hw(_clock_source: LSClockSource) -> Rate {
pub(super) fn get_duty_res(ledc: &RegisterBlock, number: TimerNumber, _is_hs: bool) -> u8 {
ledc.timer(number as usize).conf().read().duty_res().bits()
}

pub(super) fn ls_freq_hw(_clock_source: ClockSource) -> Rate {
Rate::from_hz(clocks::apb_clk_frequency())
}

Expand Down
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