Skip to content
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
17 changes: 17 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
# ModelSim/Questa generated files
/work/
transcript
vsim.wlf
*.wlf
*.vstf
*.log

# Backup files
*~
*.swp
*.bak
.$*
# Compiled libraries
riviera/
questa_lib/
.vscode
43 changes: 43 additions & 0 deletions Muhammad_Boota/README.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,43 @@
# Digital Design and Verification Training

## Overview
This directory contains all lab modules, documentation, and source code for the Digital Design and Verification Training using SystemVerilog. Each lab focuses on a key digital design concept, progressing from basic combinational logic to advanced interface protocols and verification techniques.

## Directory Structure
- **lab1**: Basic Combinational Circuits (ALU, Priority Encoder)
- **lab2**: Advanced Combinational Logic (Barrel Shifter, BCD Converter)
- **lab3**: Sequential Circuit Fundamentals (Programmable Counter)
- **lab4**: Finite State Machines (Traffic Light Controller, Vending Machine Controller)
- **lab5**: Counters and Timers (Multi-Mode Timer)
- **lab6**: Memory Interfaces (SRAM Controller)
- **lab7**: FIFO Design (Synchronous and Asynchronous FIFO)
- **lab8**: UART Controller (Transmitter, Receiver)
- **lab9**: SPI Controller (Master Controller)
- **lab10**: AXI4-Lite Interface Design (Slave Module)

## Documentation
Each lab folder contains:
- **readme.md**: Lab objectives, specifications, block diagrams, state diagrams, timing diagrams, and code framework.
- **docx/**: Design documentation, diagrams, and synthesis reports.
- **src/**: SystemVerilog source code for each module.
- **tests/**: Testbenches and makefiles for simulation and verification.

## Getting Started
1. Review the lab manual and specifications in each lab's `readme.md`.
2. Study the block diagrams and state diagrams before coding.
3. Follow the design steps and code frameworks provided.
4. Use the testbenches to verify functionality after implementation.
---
For details on each lab, see the respective `readme.md` files in each subdirectory.


## Testing
To test a module
1. Clone the repo.
2. Go to lab and then task(if present) which you want to run.
3. Go to test folder and open its makefile.
4. replace the **PROJECT_ROOT** by the your directory of project .For example ![makefile_project](/Muhammad_Boota/docx/makefile_project.png)
then save it.
5. for compile file run in terminal **make c**
6. For simulation run **make sim**
7. for terminal view tests run **make**
121 changes: 121 additions & 0 deletions Muhammad_Boota/defines/defines.sv
Original file line number Diff line number Diff line change
@@ -0,0 +1,121 @@
package pkg;
typedef enum logic [2:0] {
ADD=3'h0,
SUB=3'h1,
AND=3'h2,
OR =3'h3,
XOR=3'h4,
NOT=3'h5,
SLL=3'h6,
SRL=3'h7
} operation;

typedef enum logic{
SHIFT =1'b0,
ROTATE=1'b1
} mode;

typedef enum logic{
LEFT =1'b0,
RIGHT =1'b1
} direction;

typedef struct packed {
logic [3:0]nible_1;
logic [3:0]nible_2;
logic [3:0]nible_3;
logic [7:0]binary_in;
} bcd;

typedef enum logic[2:0] {
NS_GREEN_EW_RED,
NS_YELLOW_EW_RED,
NS_RED_EW_GREEN,
NS_RED_EW_YELLOW,
EMERGENCY_ALL_RED,
PEDESTRIAN_CROSSING,
STARTUP_FLASH
} traffic;
typedef enum logic [1:0] {
RED,
GREEN,
YELLOW
} traffic_lights;

typedef enum logic [2:0] {
C_0,
C_5,
C_10,
C_15,
C_20,
C_25
} coins;

typedef enum logic[5:0] {
COIN_0= 6'b111110,
COIN_5= 6'b111101,
COIN_10=6'b111011,
COIN_15=6'b110111,
COIN_20=6'b101111,
COIN_25=6'b011111,
ERROR =6'b111111
} display;

typedef enum logic [1:0] {
OFF=2'b00,
ONE_SHORT=2'b01,
PERIODIC=2'b10,
PWM=2'b11
} timer_mode;

typedef enum logic [2:0] {
IDEAL,
LOAD,
START_BIT,
DATA_BITS,
PARITY,
STOP_BIT
} uart_transmit;

typedef enum logic [2:0] {
RX_IDEAL,
RX_START_BIT,
RX_DATA_BITS,
RX_PARITY,
RX_STOP_BIT
} uart_receive;

typedef struct packed {
logic parity_bit;
logic stop_bit;
} uart_status_reg_en;

typedef enum logic [1:0] {
INITIAL,
READ,
WRITE,
DONE
} sram_state;

typedef enum logic [1:0] {
IDLE,
SETUP,
TRANSFER,
COMPLETE
} spi_state;

// State machines for read and write channels
typedef enum logic [1:0] {
W_IDLE,
W_ADDR,
W_DATA,
W_RESP
} write_state_t;
typedef enum logic [1:0] {
R_IDLE,
R_ADDR,
R_DATA
} read_state_t;
endpackage


Binary file added Muhammad_Boota/docx/03-systemverilog_2018.pdf
Binary file not shown.
Binary file added Muhammad_Boota/docx/AXI4_specification.pdf
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file added Muhammad_Boota/docx/always_blocks.pdf
Binary file not shown.
Binary file not shown.
Binary file added Muhammad_Boota/docx/makefile_project.png
Loading
Sorry, something went wrong. Reload?
Sorry, we cannot display this file.
Sorry, this file is invalid so it cannot be displayed.
Binary file added Muhammad_Boota/docx/state_mach_onehot.pdf
Binary file not shown.
Loading
Sorry, something went wrong. Reload?
Sorry, we cannot display this file.
Sorry, this file is invalid so it cannot be displayed.
86 changes: 86 additions & 0 deletions Muhammad_Boota/lab1/task_1/docx/ALU.drawio
Original file line number Diff line number Diff line change
@@ -0,0 +1,86 @@
<mxfile host="Electron" agent="Mozilla/5.0 (Windows NT 10.0; Win64; x64) AppleWebKit/537.36 (KHTML, like Gecko) draw.io/27.0.9 Chrome/134.0.6998.205 Electron/35.4.0 Safari/537.36" version="27.0.9">
<diagram name="Page-1" id="bkSHvbujYp-ZtlHO3QUZ">
<mxGraphModel dx="872" dy="571" grid="1" gridSize="10" guides="1" tooltips="1" connect="1" arrows="1" fold="1" page="1" pageScale="1" pageWidth="850" pageHeight="1100" math="0" shadow="0">
<root>
<mxCell id="0" />
<mxCell id="1" parent="0" />
<mxCell id="NKl2L97NzdM7iE9_YBUj-2" value="ALU" style="rounded=0;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="370" y="90" width="120" height="240" as="geometry" />
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-3" value="" style="endArrow=classic;html=1;rounded=0;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="270" y="140" as="sourcePoint" />
<mxPoint x="370" y="140" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-12" value="&lt;div style=&quot;color: rgb(59, 59, 59); font-family: Consolas, &amp;quot;Courier New&amp;quot;, monospace; font-size: 14px; line-height: 19px; white-space-collapse: preserve;&quot;&gt;&lt;span style=&quot;color: #001080;&quot;&gt;op&lt;/span&gt;&lt;/div&gt;" style="edgeLabel;html=1;align=center;verticalAlign=middle;resizable=0;points=[];" vertex="1" connectable="0" parent="NKl2L97NzdM7iE9_YBUj-3">
<mxGeometry x="0.04" y="3" relative="1" as="geometry">
<mxPoint x="-2" y="-7" as="offset" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-5" value="" style="endArrow=classic;html=1;rounded=0;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="270" y="170" as="sourcePoint" />
<mxPoint x="370" y="170" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-6" value="" style="endArrow=classic;html=1;rounded=0;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="270" y="200" as="sourcePoint" />
<mxPoint x="370" y="200" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-8" value="" style="endArrow=classic;html=1;rounded=0;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="490" y="140" as="sourcePoint" />
<mxPoint x="590" y="140" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-16" value="&lt;div style=&quot;color: rgb(59, 59, 59); font-family: Consolas, &amp;quot;Courier New&amp;quot;, monospace; font-size: 14px; line-height: 19px; white-space-collapse: preserve;&quot;&gt;&lt;span style=&quot;color: #001080;&quot;&gt;out&lt;/span&gt;&lt;/div&gt;" style="edgeLabel;html=1;align=center;verticalAlign=middle;resizable=0;points=[];" vertex="1" connectable="0" parent="NKl2L97NzdM7iE9_YBUj-8">
<mxGeometry x="-0.02" y="3" relative="1" as="geometry">
<mxPoint as="offset" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-9" value="" style="endArrow=classic;html=1;rounded=0;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="490" y="170" as="sourcePoint" />
<mxPoint x="590" y="170" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-17" value="&lt;div style=&quot;color: rgb(59, 59, 59); font-family: Consolas, &amp;quot;Courier New&amp;quot;, monospace; font-size: 14px; line-height: 19px; white-space-collapse: preserve;&quot;&gt;&lt;span style=&quot;color: #001080;&quot;&gt;overflow&lt;/span&gt;&lt;/div&gt;" style="edgeLabel;html=1;align=center;verticalAlign=middle;resizable=0;points=[];" vertex="1" connectable="0" parent="NKl2L97NzdM7iE9_YBUj-9">
<mxGeometry x="-0.04" y="3" relative="1" as="geometry">
<mxPoint as="offset" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-10" value="" style="endArrow=classic;html=1;rounded=0;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="490" y="200" as="sourcePoint" />
<mxPoint x="590" y="200" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-18" value="&lt;div style=&quot;color: rgb(59, 59, 59); font-family: Consolas, &amp;quot;Courier New&amp;quot;, monospace; font-size: 14px; line-height: 19px; white-space-collapse: preserve;&quot;&gt;&lt;span style=&quot;color: #001080;&quot;&gt;zero&lt;/span&gt;&lt;/div&gt;" style="edgeLabel;html=1;align=center;verticalAlign=middle;resizable=0;points=[];" vertex="1" connectable="0" parent="NKl2L97NzdM7iE9_YBUj-10">
<mxGeometry x="-0.14" y="2" relative="1" as="geometry">
<mxPoint as="offset" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-11" value="" style="endArrow=classic;html=1;rounded=0;" edge="1" parent="1">
<mxGeometry width="50" height="50" relative="1" as="geometry">
<mxPoint x="490" y="230" as="sourcePoint" />
<mxPoint x="590" y="230" as="targetPoint" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-19" value="&lt;div style=&quot;color: rgb(59, 59, 59); font-family: Consolas, &amp;quot;Courier New&amp;quot;, monospace; font-size: 14px; line-height: 19px; white-space-collapse: preserve;&quot;&gt;&lt;span style=&quot;color: #001080;&quot;&gt;carry&lt;/span&gt;&lt;/div&gt;" style="edgeLabel;html=1;align=center;verticalAlign=middle;resizable=0;points=[];" vertex="1" connectable="0" parent="NKl2L97NzdM7iE9_YBUj-11">
<mxGeometry x="-0.04" y="4" relative="1" as="geometry">
<mxPoint as="offset" />
</mxGeometry>
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-13" value="&lt;div style=&quot;color: #3b3b3b;background-color: #ffffff;font-family: Consolas, &#39;Courier New&#39;, monospace;font-weight: normal;font-size: 14px;line-height: 19px;white-space: pre;&quot;&gt;&lt;div&gt;&lt;span style=&quot;color: #001080;&quot;&gt;num1&lt;/span&gt;&lt;/div&gt;&lt;/div&gt;" style="text;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="300" y="140" width="60" height="40" as="geometry" />
</mxCell>
<mxCell id="NKl2L97NzdM7iE9_YBUj-14" value="&lt;div style=&quot;color: #3b3b3b;background-color: #ffffff;font-family: Consolas, &#39;Courier New&#39;, monospace;font-weight: normal;font-size: 14px;line-height: 19px;white-space: pre;&quot;&gt;&lt;div&gt;&lt;span style=&quot;color: #001080;&quot;&gt;num2&lt;/span&gt;&lt;/div&gt;&lt;/div&gt;" style="text;whiteSpace=wrap;html=1;" vertex="1" parent="1">
<mxGeometry x="300" y="170" width="60" height="40" as="geometry" />
</mxCell>
</root>
</mxGraphModel>
</diagram>
</mxfile>
Binary file added Muhammad_Boota/lab1/task_1/docx/ALU.png
Loading
Sorry, something went wrong. Reload?
Sorry, we cannot display this file.
Sorry, this file is invalid so it cannot be displayed.
Loading