Validate all NanoPC-T6 patch applicability and remove stale non-applying patch

docs/nanopc-T6.md

@@ -69,7 +69,7 @@ For the current NanoPC-T6 image path, the kernel comes from `nabam/nixos-rockchi
 
 1. Keep mainline/nabam kernel and align reset configuration with FriendlyARM semantics.
 2. Keep OP-TEE `firmware`/`reserved-memory` nodes in DTS patch.
-3. Mirror FriendlyARM reset semantics by setting `pmic-reset-func = <1>` in DTS and adding a compatibility kernel patch that prefers `pmic-reset-func` (falls back to `rockchip,reset-mode`, defaults to mode `0` if neither is set).
+3. Apply focused RK806 compatibility patches in Linux `rk8xx-core.c` so `rockchip,reset-mode` is honored there and defaults to mode `2` when the property is missing (matching the U-Boot commit behavior).
 
 ### 3. Mask ROM Button (SARADC)
 
@@ -97,7 +97,7 @@ Earlier attempts tried:
 5. Setting `rockchip,reset-mode = <1>` — was never actually tested due to malformed patch (build failed)
 6. Setting `rockchip,reset-mode = <0>` — mode 0 (restart PMU) tested but didn't work; SoC may not reset if caps hold voltage
 7. Removing `rockchip,reset-mode` entirely — tested but didn't work; letting U-Boot config persist wasn't enough because the MFD driver's `pre_init_reg` still modifies SYS_CFG3 (enables SLAVE_RESTART_FUN)
-8. **Current path**: Use nabam mainline kernel + RK806 reset compatibility patches mirroring FriendlyARM semantics
+8. **Current path**: Use nabam mainline kernel + RK806 core compatibility patches mirroring FriendlyARM semantics
 
 ## Device peripheral firmware
 

nix/builders/nanopc-t6/base.nix

@@ -72,7 +72,7 @@
     let
       # Use nabam's mainline-based rockchip kernel (linux_latest with rockchip config).
       # Merge our RK806 options and append compatibility patches directly.
-      baseKernel = inputs.rockchip.legacyPackages.aarch64-linux.kernel_linux_latest_rockchip_unstable;
+      baseKernel = inputs.rockchip.legacyPackages.aarch64-linux.kernel_linux_latest_rockchip or inputs.rockchip.legacyPackages.aarch64-linux.kernel_linux_latest_rockchip_unstable;
       customKernel = baseKernel.kernel.override (prev: {
         structuredExtraConfig = (prev.structuredExtraConfig or {}) // (with lib.kernel; {
           MFD_RK8XX_SPI = yes;        # RK806 PMIC MFD driver via SPI
@@ -88,6 +88,10 @@
             name = "rk806-friendlyarm-reset-compat.patch";
             patch = ./rk806-friendlyarm-reset-compat.patch;
           }
+          {
+            name = "rk806-disable-slave-restart.patch";
+            patch = ./rk806-disable-slave-restart.patch;
+          }
         ];
       });
     in

nix/builders/nanopc-t6/rk806-disable-slave-restart.patch

@@ -1,6 +1,6 @@
 --- a/drivers/mfd/rk8xx-core.c
 +++ b/drivers/mfd/rk8xx-core.c
-@@ -154,7 +154,7 @@
+@@ -154,6 +154,6 @@
  static const struct rk808_reg_data rk806_pre_init_reg[] = {
  	{ RK806_GPIO_INT_CONFIG, RK806_INT_POL_MSK, RK806_INT_POL_L },
 -	{ RK806_SYS_CFG3, RK806_SLAVE_RESTART_FUN_MSK, RK806_SLAVE_RESTART_FUN_EN },

nix/builders/nanopc-t6/rk806-friendlyarm-reset-compat.patch

@@ -1,14 +1,14 @@
 --- a/drivers/mfd/rk8xx-core.c
 +++ b/drivers/mfd/rk8xx-core.c
-@@ -716,8 +716,11 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regma
+@@ -716,8 +716,8 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regma
  		dual_support = IRQF_SHARED;
 
 -		ret = device_property_read_u32(dev, "rockchip,reset-mode", &rst_fun);
 -		if (ret)
 -			break;
-+		if (device_property_read_u32(dev, "pmic-reset-func", &rst_fun) &&
-+		    device_property_read_u32(dev, "rockchip,reset-mode", &rst_fun))
-+			rst_fun = 0;
++		ret = device_property_read_u32(dev, "rockchip,reset-mode", &rst_fun);
++		if (ret)
++			rst_fun = 2;
 
  		ret = regmap_update_bits(rk808->regmap, RK806_SYS_CFG3, RK806_RST_FUN_MSK,
  					 FIELD_PREP(RK806_RST_FUN_MSK, rst_fun));