Add AMD GPU support via ROCm/HIP - #39
Open
jeffdaily wants to merge 1 commit into
Open
Conversation
This adds AMD GPU support to dgSPARSE-Lib through ROCm/HIP, alongside the existing CUDA path. A CUDAExtension built against a ROCm PyTorch wheel automatically runs torch.utils.hipify on the extension's CUDA sources, translating the CUDA runtime and cuSPARSE calls to their HIP equivalents at build time. The changes here make the existing kernels and build script compatible with that hipified output, so the library builds and runs on AMD GPUs with no separate code path to maintain. What changed: - setup.py: detect a ROCm build via torch.version.hip, treat it as a valid GPU build (ROCm has CUDA_HOME=None), and link hipsparse instead of cusparse. On Windows with ROCm, a BuildExtension subclass registers .hip as a C++ source extension and routes the host op-wrapper .cpp through hipcc via a generated shim (MSVC's cl.exe cannot parse the HIP runtime headers' GCC __attribute__ syntax), enabling ninja so include paths with spaces are escaped. - The CUDA headers guard their CUDA-only includes (device_atomic_functions.h, device_launch_parameters.h) under USE_ROCM, since HIP provides these through hip_runtime.h; the warp shuffles use a 64-bit full mask under ROCm (the __shfl*_sync intrinsics require it there) while keeping width-32 subgroup semantics that work on wave64 and wave32. - A few cuSPARSE/cuBLAS symbols that hipify does not currently map are aliased under USE_ROCM so the hipified sources compile unchanged; version.cpp returns HIP_VERSION on ROCm. Test Plan: Built and tested on an AMD Instinct MI250X (gfx90a) with ROCm 7.2.1; kernel compilation additionally covers gfx942, gfx950, and gfx1100. On Windows, built and tested on an AMD Radeon RX 9070 XT (gfx1201, RDNA4), where all five SpMM tests (spmm_sum/max/min/mean forward and spmm_sum backward) pass. The CUDA build path is unchanged; it was reconfirmed by building the GPU extension with nvcc (CUDA 12.8) against an upstream CUDA PyTorch wheel. This work was authored with the assistance of Claude, an AI assistant by Anthropic.
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
This adds AMD GPU support to dgSPARSE-Lib through ROCm/HIP, alongside the existing CUDA path.
A
CUDAExtensionbuilt against a ROCm PyTorch wheel automatically runstorch.utils.hipifyon the extension's CUDA sources, translating the CUDA runtime and cuSPARSE calls to their HIP equivalents at build time. The changes here make the existing kernels and build script compatible with that hipified output, so the library builds and runs on AMD GPUs with no separate code path to maintain.What changed
setup.py: detect a ROCm build viatorch.version.hip, treat it as a valid GPU build (ROCm hasCUDA_HOME=None), and linkhipsparseinstead ofcusparse. On Windows with ROCm, aBuildExtensionsubclass registers.hipas a C++ source extension (hipify renames.cuto.hip), routes the host op-wrapper.cppthrough hipcc via a generated shim (MSVC'scl.execannot parse the HIP runtime headers' GCC__attribute__syntax), and enables ninja so include paths with spaces are escaped before being forwarded to hipcc.cuda_util.cuh,sddmm_cuda.cuh,spmm_cuda.cuh, and thesddmmheaders: guard the CUDA-only includes (device_atomic_functions.h,device_launch_parameters.h) underUSE_ROCM, since HIP provides these throughhip_runtime.h.__shfl*_syncintrinsics require a 64-bit mask there. The shuffles remain explicit width-32 subgroup operations, which work on both wave64 (CDNA) and wave32 (RDNA).csr2csc.cuhandspconv_cuda.cu: define HIP aliases for a few cuSPARSE/cuBLAS symbols and enums that hipify does not currently map, so the hipified sources compile unchanged.version.cpp: returnHIP_VERSIONinstead ofCUDA_VERSIONon ROCm..gitignore: exclude the hipified outputs and Windows build shims.README.md: document the ROCm build alongside the CUDA build.Building on AMD GPUs
Install a ROCm build of PyTorch, then build from source as usual:
Validation
Built and tested on an AMD Instinct MI250X (gfx90a) with ROCm 7.2.1; kernel compilation additionally covers gfx942, gfx950, and gfx1100. On Windows, built and tested on an AMD Radeon RX 9070 XT (gfx1201, RDNA4), where all five SpMM tests (spmm_sum/max/min/mean forward and spmm_sum backward) pass.
The CUDA build path is unchanged.
This work was prepared with assistance from Claude, an AI assistant by Anthropic.