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Add AMD GPU support via ROCm/HIP - #39

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Add AMD GPU support via ROCm/HIP#39
jeffdaily wants to merge 1 commit into
dgSPARSE:mainfrom
AMD-Ecosystem:moat-port

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This adds AMD GPU support to dgSPARSE-Lib through ROCm/HIP, alongside the existing CUDA path.

A CUDAExtension built against a ROCm PyTorch wheel automatically runs torch.utils.hipify on the extension's CUDA sources, translating the CUDA runtime and cuSPARSE calls to their HIP equivalents at build time. The changes here make the existing kernels and build script compatible with that hipified output, so the library builds and runs on AMD GPUs with no separate code path to maintain.

What changed

  • setup.py: detect a ROCm build via torch.version.hip, treat it as a valid GPU build (ROCm has CUDA_HOME=None), and link hipsparse instead of cusparse. On Windows with ROCm, a BuildExtension subclass registers .hip as a C++ source extension (hipify renames .cu to .hip), routes the host op-wrapper .cpp through hipcc via a generated shim (MSVC's cl.exe cannot parse the HIP runtime headers' GCC __attribute__ syntax), and enables ninja so include paths with spaces are escaped before being forwarded to hipcc.
  • cuda_util.cuh, sddmm_cuda.cuh, spmm_cuda.cuh, and the sddmm headers: guard the CUDA-only includes (device_atomic_functions.h, device_launch_parameters.h) under USE_ROCM, since HIP provides these through hip_runtime.h.
  • Warp shuffles: use a 64-bit full mask under ROCm. The __shfl*_sync intrinsics require a 64-bit mask there. The shuffles remain explicit width-32 subgroup operations, which work on both wave64 (CDNA) and wave32 (RDNA).
  • csr2csc.cuh and spconv_cuda.cu: define HIP aliases for a few cuSPARSE/cuBLAS symbols and enums that hipify does not currently map, so the hipified sources compile unchanged.
  • version.cpp: return HIP_VERSION instead of CUDA_VERSION on ROCm.
  • .gitignore: exclude the hipified outputs and Windows build shims.
  • README.md: document the ROCm build alongside the CUDA build.

Building on AMD GPUs

Install a ROCm build of PyTorch, then build from source as usual:

export PYTORCH_ROCM_ARCH=gfx90a # your AMD GPU arch
pip install -e .

Validation

Built and tested on an AMD Instinct MI250X (gfx90a) with ROCm 7.2.1; kernel compilation additionally covers gfx942, gfx950, and gfx1100. On Windows, built and tested on an AMD Radeon RX 9070 XT (gfx1201, RDNA4), where all five SpMM tests (spmm_sum/max/min/mean forward and spmm_sum backward) pass.

The CUDA build path is unchanged.

This work was prepared with assistance from Claude, an AI assistant by Anthropic.

This adds AMD GPU support to dgSPARSE-Lib through ROCm/HIP, alongside the
existing CUDA path. A CUDAExtension built against a ROCm PyTorch wheel
automatically runs torch.utils.hipify on the extension's CUDA sources,
translating the CUDA runtime and cuSPARSE calls to their HIP equivalents at
build time. The changes here make the existing kernels and build script
compatible with that hipified output, so the library builds and runs on AMD
GPUs with no separate code path to maintain.

What changed:
- setup.py: detect a ROCm build via torch.version.hip, treat it as a valid GPU
  build (ROCm has CUDA_HOME=None), and link hipsparse instead of cusparse. On
  Windows with ROCm, a BuildExtension subclass registers .hip as a C++ source
  extension and routes the host op-wrapper .cpp through hipcc via a generated
  shim (MSVC's cl.exe cannot parse the HIP runtime headers' GCC __attribute__
  syntax), enabling ninja so include paths with spaces are escaped.
- The CUDA headers guard their CUDA-only includes (device_atomic_functions.h,
  device_launch_parameters.h) under USE_ROCM, since HIP provides these through
  hip_runtime.h; the warp shuffles use a 64-bit full mask under ROCm (the
  __shfl*_sync intrinsics require it there) while keeping width-32 subgroup
  semantics that work on wave64 and wave32.
- A few cuSPARSE/cuBLAS symbols that hipify does not currently map are aliased
  under USE_ROCM so the hipified sources compile unchanged; version.cpp returns
  HIP_VERSION on ROCm.

Test Plan:
Built and tested on an AMD Instinct MI250X (gfx90a) with ROCm 7.2.1; kernel
compilation additionally covers gfx942, gfx950, and gfx1100. On Windows, built
and tested on an AMD Radeon RX 9070 XT (gfx1201, RDNA4), where all five SpMM
tests (spmm_sum/max/min/mean forward and spmm_sum backward) pass. The CUDA
build path is unchanged; it was reconfirmed by building the GPU extension with
nvcc (CUDA 12.8) against an upstream CUDA PyTorch wheel.

This work was authored with the assistance of Claude, an AI assistant by
Anthropic.
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