Timeout fix - #14
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July 14, 2026 17:55
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July 14, 2026 19:38
Falling-edge samples were too late and captured the next ROM opcode instead of the STA byte; settle halfway through PHI2 high while D-bus stays Hi-Z.
Fixed mid-high settle still returned 00 on Pico W; keep the last sample while PHI2 is high so both Pico W and Pico 2 W see STA bytes.
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Fix for timout and rw