reference-designs/pulsar-lvds-adc: Add pulsar-lvds-adc documentation pages

docs/solutions/reference-designs/pulsar-lvds-adc/index.rst

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+.. _pulsar-lvds-adc:
+
+PULSAR-LVDS-ADC
+===============
+
+16-Bit/18-Bit, 5 MSPS to 10 MSPS PulSAR LVDS Differential ADC Family
+
+..
+   To be added: chip or evaluation board photo, download from ADI product page
+   (e.g. AD7960) and save as images/pulsar_lvds_adc_chip.png, then uncomment:
+   .. image:: images/pulsar_lvds_adc_chip.png
+      :align: left
+      :width: 100
+
+Overview
+--------
+
+The :adi:`AD7625`, :adi:`AD7626`, :adi:`AD7960`, and :adi:`AD7961` are
+high-performance successive approximation register (SAR) analog-to-digital
+converters from the PulSAR LVDS family. They feature charge redistribution
+SAR architecture with LVDS self-clocked or echoed-clock serial interfaces.
+
+The :adi:`AD7625` is a 16-bit, 6 MSPS ADC and the :adi:`AD7626` is a 16-bit,
+10 MSPS ADC. Both achieve 92 dB SNR with excellent linearity of ±1 LSB INL.
+They require an external 2.048 V reference.
+
+The :adi:`AD7960` is an 18-bit, 5 MSPS ADC and the :adi:`AD7961` is a 16-bit,
+5 MSPS ADC. They provide 99 dB SNR (AD7960) and 92 dB SNR (AD7961) with
+±1 LSB INL. They operate with an external 5 V reference.
+
+All devices feature internal reference buffers, low power dissipation, and LVDS
+digital outputs suitable for high-speed data acquisition systems.
+
+Features:
+
+-  16-bit or 18-bit resolution, up to 10 MSPS throughput
+-  92 dB to 99 dB SNR, ±1 LSB INL
+-  LVDS self-clocked or echoed-clock serial interface
+-  Internal reference buffer
+-  Low power dissipation
+-  Charge redistribution SAR architecture
+
+Applications:
+
+-  Digital imaging
+-  High-speed data acquisition
+-  Telecommunications
+-  Spectrum analysis
+-  Test and measurement equipment
+-  Medical instrumentation
+
+..
+   To be added: evaluation board photo
+   .. figure:: images/pulsar_lvds_adc_eval.png
+      :align: center
+      :width: 400
+
+      PULSAR-LVDS-ADC evaluation board
+
+Recommendations
+---------------
+
+People who follow the flow that is outlined, have a much better experience
+with things. However, like many things, documentation is never as complete
+as it should be. If you have any questions, feel free to ask on our
+:ref:`EngineerZone forums <help-and-support>`, but before that, please make
+sure you read our documentation thoroughly.
+
+To better understand these devices, we recommend using one of the following
+evaluation boards:
+
+-  :adi:`EVAL-AD7625` for the AD7625
+-  :adi:`EVAL-AD7626` for the AD7626
+-  :adi:`EVAL-AD7960` for the AD7960
+-  :adi:`EVAL-AD7961` for the AD7961
+
+Table of contents
+-----------------
+
+#. Using the evaluation board/full stack reference design that we offer:
+
+   #. :ref:`Prerequisites <pulsar-lvds-adc prerequisites>` - what you
+      need to get started
+   #. :ref:`Quick start guides <pulsar-lvds-adc quickstart>`:
+
+      #. Using the :ref:`Zedboard / Zynq-7000 SoC
+         <pulsar-lvds-adc quickstart zed>`
+
+   #. Configure an SD Card with
+      :external+kuiper:doc:`Kuiper <index>`
+
+   #. Linux Applications
+
+      #. :ref:`iio-oscilloscope`
+
+#. Design with the AD7625/AD7626/AD7960/AD7961
+
+   #. HDL reference design
+
+      #. :external+hdl:ref:`pulsar_lvds_adc` which
+         you must use in your FPGA.
+
+#. :ref:`Help and Support <help-and-support>`
+
+Functional Block Diagram
+~~~~~~~~~~~~~~~~~~~~~~~~~
+
+..
+   To be added: functional block diagram
+   .. figure:: images/pulsar_lvds_adc_block_diagram.png
+      :width: 1000
+
+      PULSAR-LVDS-ADC functional block diagram
+
+.. toctree::
+   :hidden:
+
+   user-guide
+   quickstart/index
+   prerequisites
+
+Additional Information and Useful Links
+----------------------------------------
+
+-  :adi:`AD7625 Product Page <AD7625>`
+-  :adi:`AD7626 Product Page <AD7626>`
+-  :adi:`AD7960 Product Page <AD7960>`
+-  :adi:`AD7961 Product Page <AD7961>`
+-  :adi:`EVAL-AD7625 Evaluation Board <EVAL-AD7625>`
+-  :adi:`EVAL-AD7626 Evaluation Board <EVAL-AD7626>`
+-  :adi:`EVAL-AD7960 Evaluation Board <EVAL-AD7960>`
+-  :adi:`EVAL-AD7961 Evaluation Board <EVAL-AD7961>`
+-  :adi:`AD7625/AD7626 Data Sheet
+   <media/en/technical-documentation/data-sheets/ad7625-7626.pdf>`
+-  :adi:`AD7960/AD7961 Data Sheet
+   <media/en/technical-documentation/data-sheets/AD7960-7961.pdf>`
+-  :adi:`UG-745: EVAL-AD7625/EVAL-AD7626 User Guide
+   <media/en/technical-documentation/user-guides/eval-ad7625-7626-ug-745.pdf>`
+-  :adi:`UG-490: EVAL-AD7960/EVAL-AD7961 User Guide
+   <media/en/technical-documentation/user-guides/UG-490.pdf>`
+
+Warning
+--------
+
+.. esd-warning::
+
+Help and support
+----------------
+
+Please go to :ref:`Help and Support <help-and-support>` page.

docs/solutions/reference-designs/pulsar-lvds-adc/prerequisites.rst

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+.. _pulsar-lvds-adc prerequisites:
+
+Prerequisites
+=============
+
+What you need, depends on what you are trying to do. As a minimum, you need to
+start out with:
+
+Hardware prerequisites
+----------------------
+
+#. One of the PulSAR LVDS ADC evaluation boards:
+
+   - :adi:`EVAL-AD7625` (16-bit, 6 MSPS)
+   - :adi:`EVAL-AD7626` (16-bit, 10 MSPS)
+   - :adi:`EVAL-AD7960` (18-bit, 5 MSPS)
+   - :adi:`EVAL-AD7961` (16-bit, 5 MSPS)
+
+#. An FPGA carrier platform. Our recommended ones can be found
+   :ref:`here <pulsar-lvds-adc carriers>`.
+
+   - There are a few more boards, which do work, but are currently not
+     supported by us. The experience with the fabric-only solutions is very
+     close to the ARM/FPGA SoC based solutions, but the GUI runs on a host PC
+     (Windows or Linux).
+
+#. Some way to interact with the FPGA platform:
+
+   #. for the ARM/FPGA SoC platforms, this normally includes:
+
+      - Micro-USB cable for UART console
+      - LAN cable (Ethernet) for SSH or IIO applications
+      - HDMI or DisplayPort monitor (Optional)
+      - USB Keyboard (Optional)
+      - USB Mouse (Optional)
+
+   #. for the FPGA only solutions, this includes:
+
+      - LAN cable (Ethernet)
+      - Host PC (Windows or Linux)
+      - Micro-USB cable for UART
+      - Micro-USB cable for JTAG (PROG)
+
+#. Internet connection (without proxies makes things much easier) to update
+   the scripts/binaries on the SD card that came with the ADI FMC Card
+   (firewalls are OK, proxies make things a pain).
+#. Test equipment for generating analog input signals.
+#. An SD card with at least 16GB of memory (in case you're using Linux). You
+   should have received one when purchasing the evaluation board.
+
+Software prerequisites
+----------------------
+
+Normally, for basic functionalities regarding visualizing the data received
+from the FPGA, we use the following:
+
+#. :external+scopy:doc:`Scopy <index>` v2.0 or later (must contain the IIO
+   plugin)
+#. :git-iio-oscilloscope:`IIO Oscilloscope <releases+>`
+#. UART terminal application (PuTTY/TeraTerm/Minicom/MobaXterm), 115200, 8N1
+
+.. note::
+
+   :adi:`ADI <>` does not offer FPGA carrier platforms for sale or loan;
+   getting one yourself is the normal part of development or evaluation.

docs/solutions/reference-designs/pulsar-lvds-adc/quickstart/index.rst

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+.. _pulsar-lvds-adc quickstart:
+
+Quickstart
+==========
+
+The Quick start guides provide simple step by step instructions on how to
+do an initial system setup for the PulSAR LVDS ADC evaluation boards
+(:adi:`EVAL-AD7625`, :adi:`EVAL-AD7626`, :adi:`EVAL-AD7960`,
+:adi:`EVAL-AD7961`) on various FPGA development boards. In these guides, we
+will discuss how to program the bitstream, run a no-OS program or boot a Linux
+distribution.
+
+.. toctree::
+
+   Zedboard <zed>
+
+.. _pulsar-lvds-adc carriers:
+
+Supported carriers
+------------------
+
+The PulSAR LVDS ADC evaluation boards are, by definition, "FPGA
+mezzanine cards" (FMC); that means they need a carrier to plug into.
+
+The carriers we support are:
+
+.. list-table::
+   :header-rows: 1
+
+   - - FPGA board
+     - EVAL-AD7625/AD7626/AD7960/AD7961
+   - - `ZedBoard
+       <https://digilent.com/reference/programmable-logic/zedboard/start>`__
+     - FMC LPC
+
+Supported Environments
+----------------------
+
+The supported OS are:
+
+.. list-table::
+   :header-rows: 1
+
+   - - FPGA board
+     - HDL
+     - Linux software
+     - No-OS software
+   - - `ZedBoard
+       <https://digilent.com/reference/programmable-logic/zedboard/start>`__
+     - Yes
+     - Yes
+     - Yes
+
+Hardware Setup
+--------------
+
+The evaluation board connects to the FMC LPC connector of the carrier board.
+The carrier setup requires power, UART (115200), ethernet (Linux), HDMI
+(if available) and/or JTAG (no-OS) connections.
+
+A few typical setups are shown below.
+
+ZedBoard + PulSAR LVDS ADC
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+..
+   To be added: photo of the PulSAR LVDS ADC evaluation board connected to
+   the ZedBoard via FMC LPC connector (hardware setup photo)
+   .. figure:: ../images/pulsar_lvds_adc_zed_setup.jpg
+      :align: center
+      :width: 500
+
+      ZedBoard + PulSAR LVDS ADC hardware setup