reference-designs: Add AD974x system level doc and quickstart guides

docs/solutions/reference-designs/eval-ad974x-fmc/index.rst

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+.. _eval-ad974x fmc ebz:
+
+EVAL-AD974X
+===============================================================================
+
+14-Bit / 12-Bit / 10-Bit / 8-Bit, 210 MSPS TxDAC D/A Converter Evaluation Board.
+
+.. image:: ./images/ad9744_chip_icon.jpeg
+   :align: left
+   :width: 150
+
+Overview
+-------------------------------------------------------------------------------
+
+The :adi:`EVAL-AD9740` / :adi:`EVAL-AD9742`/ :adi:`EVAL-AD9744` /
+:adi:`EVAL-AD9748` evaluation board allows users to easily set up and test the
+32-lead lead frame chip scale package (LFCSP) of the :adi:`AD9740` /
+:adi:`AD9742` / :adi:`AD9744` / :adi:`AD9748` devices. Paying careful attention
+to layout and circuit design, combined with a prototyping area, allows the user
+to effectively evaluate the AD9740, AD9742, AD9744, and AD9748 in applications
+that require high resolution and high speed conversion.
+
+The evaluation board interfaces with an FPGA carrier via an FMC LPC
+connector, using the `ZedBoard <https://www.avnet.com/wps/portal/us/
+products/avnet-boards/avnet-board-families/zedboard/>`_ (Zynq-7000
+SoC) as the supported FPGA platform.
+
+Features:
+
+- High performance member of pin-compatible TxDAC product family
+- Excellent SFDR performance
+- Twos complement or straight binary data format
+- Differential current outputs: 2 mA to 20 mA
+- Power dissipation: 135 mW at 3.3 V
+- Power-down mode: 15 mW at 3.3 V
+- On-chip 1.2 V reference
+- CMOS-compatible digital interface
+- 32-lead LFCSP package
+- Edge triggered latches
+
+Applications:
+
+- Direct IFs
+- Base stations
+- Wireless local loops
+- Digital radio links
+- Direct digital synthesis (DDS)
+- Instrumentation
+
+.. figure:: ./images/ad9744_eval_board.jpeg
+   :alt: Photo of the EVAL-AD974x evaluation board
+   :align: center
+   :width: 600
+
+   EVAL-AD974x
+
+.. toctree::
+   :hidden:
+
+   user-guide
+   prerequisites
+   quickstart/index
+
+Recommendations
+-------------------------------------------------------------------------------
+
+People who follow the flow that is outlined have a much better experience
+with things. However, like many things, documentation is never as complete
+as it should be. If you have any questions, feel free to ask on our
+:ez:`/`, but before that, please make sure you read our documentation
+thoroughly.
+
+To better understand the :adi:`AD9740` / :adi:`AD9742` / :adi:`AD9744` /
+:adi:`AD9748`, we recommend using the :adi:`EVAL-AD9740 <EVAL-AD9740>` /
+:adi:`EVAL-AD9742 <EVAL-AD9742>` / :adi:`EVAL-AD9744 <EVAL-AD9744>` /
+:adi:`EVAL-AD9748 <EVAL-AD9748>` evaluation board together with the
+`Zedboard <https://www.avnet.com/wps/portal/us/products/avnet-boards/
+avnet-board-families/zedboard/>`_ FPGA development kit.
+
+Table of contents
+-------------------------------------------------------------------------------
+
+#. Using the evaluation board/full stack reference design that we offer:
+
+   #. :ref:`Prerequisites <eval-ad974x fmc ebz prerequisites>` - what you
+      need to get started
+   #. :ref:`Quick start guides <eval-ad974x fmc ebz quickstart>`:
+
+      #. Using the :ref:`ZedBoard <eval-ad974x fmc ebz quickstart zed>`
+      #. Using the :ref:`SDP-H1 <eval-ad974x fmc ebz quickstart sdp-h1-ace>`
+
+   #. Linux Applications
+
+      #. :ref:`iio-oscilloscope`
+      #. :external+scopy:doc:`Scopy <index>`
+
+#. Design with the AD9740 / AD9742 / AD9744 / AD9748
+
+   - :ref:`eval-ad974x fmc ebz block-diagram`
+
+     - :adi:`AD9740` product page
+     - :adi:`AD9742` product page
+     - :adi:`AD9744` product page
+     - :adi:`AD9748` product page
+
+   - Resources for designing a custom AD974x-based platform:
+
+     #. For Linux software:
+
+        #. About the device driver:
+
+           - :external+linux:ref:`AXI-DMAC DMA Controller Linux driver <axi-dmac>`
+
+     #. :external+hdl:ref:`HDL reference design <ad9740_fmc>` which you
+        must use in your FPGA.
+
+#. :ref:`Help and Support <help-and-support>`
+
+.. _eval-ad974x fmc ebz block-diagram:
+
+Block diagram
+-------------------------------------------------------------------------------
+
+The :adi:`AD9740` HDL reference design on the Zedboard uses the
+:external+hdl:ref:`AXI AD9740 <axi_ad9740>` IP core to interface the
+DAC via a parallel bus. The AXI-DMAC streams sample data from DDR memory
+to the IP core, which drives the AD974x at up to 210 MSPS.
+
+.. figure:: ./images/ad9744_block_diagram.jpeg
+   :alt: AD974x block diagram
+
+   AD974x block diagram.
+
+ADI articles
+-------------------------------------------------------------------------------
+
+#. :adi:`AD9740 Product Page <AD9740>`
+#. :adi:`AD9742 Product Page <AD9742>`
+#. :adi:`AD9744 Product Page <AD9744>`
+#. :adi:`AD9748 Product Page <AD9748>`
+
+Warning
+-------------------------------------------------------------------------------
+
+.. esd-warning::

docs/solutions/reference-designs/eval-ad974x-fmc/prerequisites.rst

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+.. _eval-ad974x fmc ebz prerequisites:
+
+Prerequisites
+===============================================================================
+
+What you need depends on what you are trying to do. As a minimum, you need
+to start out with:
+
+Hardware prerequisites
+-------------------------------------------------------------------------------
+
+#. One of the AD974x evaluation boards:
+
+   - :adi:`EVAL-AD9740 <EVAL-AD9740>` - 10-bit variant
+   - :adi:`EVAL-AD9742 <EVAL-AD9742>` - 12-bit variant
+   - :adi:`EVAL-AD9744 <EVAL-AD9744>` - 14-bit variant
+   - :adi:`EVAL-AD9748 <EVAL-AD9748>` -  8-bit variant
+
+#. `ZedBoard <https://www.avnet.com/wps/portal/us/products/avnet-boards/
+   avnet-board-families/zedboard/>`_ Rev D or later (Zynq-7000 SoC)
+#. 16 GB (or larger) Class 10 micro-SD card
+#. 12 V, 3 A power supply for the ZedBoard
+#. Micro-USB cable (UART, J14 on ZedBoard)
+#. Ethernet cable
+#. An oscilloscope for monitoring DAC outputs (J4, J5 SMB connectors)
+
+Software prerequisites
+-------------------------------------------------------------------------------
+
+The following files must be placed on the micro-SD card boot partition
+before powering on the Zedboard. They are available as part of the ADI
+Kuiper Linux image:
+
+- ``BOOT.BIN`` - pre-built boot binary for the EVAL-AD9740 / EVAL-AD9742 /
+  EVAL-AD9744 / EVAL-AD9748 on Zedboard
+- ``uImage`` - Linux kernel image
+- ``devicetree.dtb`` - device tree blob for the Zedboard + EVAL-AD9740 /
+  EVAL-AD9742 / EVAL-AD9744 / EVAL-AD9748
+
+For basic data visualization and DAC control we use:
+
+#. :git-libiio:`libiio <releases/latest+>` (required by pyadi-iio on the host PC)
+#. :git-pyadi-iio:`PyADI-IIO </>` - optional Python scripting interface
+
+.. note::
+
+   :adi:`ADI <>` does not offer FPGA carrier platforms for sale or loan;
+   obtaining a Zedboard is a normal part of evaluation and development.

docs/solutions/reference-designs/eval-ad974x-fmc/quickstart/index.rst

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+.. _eval-ad974x fmc ebz quickstart:
+
+Quick start
+===============================================================================
+
+The quick start guide provides step-by-step instructions for setting up
+the :adi:`EVAL-AD9740`, :adi:`EVAL-AD9742`, :adi:`EVAL-AD9744` or
+:adi:`EVAL-AD9748` evaluation board on the supported FPGA development
+board. This guide covers SD card preparation, hardware setup, and Linux
+IIO client usage.
+
+.. toctree::
+
+   On ZedBoard <zed>
+   On SDP-H1 <sdp-h1-ace>
+
+.. _ad974x fmc ebz carriers:
+
+Supported carriers
+-------------------------------------------------------------------------------
+
+The :adi:`EVAL-AD9740`, :adi:`EVAL-AD9742`, :adi:`EVAL-AD9744` or
+:adi:`EVAL-AD9748` connects to the FPGA carrier via an FMC LPC connector.
+VADJ must be set to 3.3 V.
+
+.. list-table::
+   :header-rows: 1
+
+   * - FPGA board
+     - :adi:`EVAL-AD9740 <EVAL-AD9740>`
+     - :adi:`EVAL-AD9742 <EVAL-AD9742>`
+     - :adi:`EVAL-AD9744 <EVAL-AD9744>`
+     - :adi:`EVAL-AD9748 <EVAL-AD9748>`
+   * - `ZedBoard <https://www.avnet.com/wps/portal/us/products/avnet-boards/avnet-board-families/zedboard/>`_
+     - FMC LPC
+     - FMC LPC
+     - FMC LPC
+     - FMC LPC
+   * - :adi:`SDP-H1 <EVAL-SDP-H1>`
+     - FMC LPC
+     - FMC LPC
+     - FMC LPC
+     - FMC LPC
+
+Supported environments
+-------------------------------------------------------------------------------
+
+.. list-table::
+   :header-rows: 1
+
+   * - FPGA board
+     - HDL
+     - Linux software
+     - No-OS software
+   * - `ZedBoard <https://www.avnet.com/wps/portal/us/products/avnet-boards/avnet-board-families/zedboard/>`_
+     - Yes
+     - Yes
+     - No
+   * - :adi:`SDP-H1 <EVAL-SDP-H1>`
+     - No
+     - No
+     - No
+
+Hardware setup
+-------------------------------------------------------------------------------
+
+The :adi:`EVAL-AD9740`, :adi:`EVAL-AD9742`, :adi:`EVAL-AD9744` or
+:adi:`EVAL-AD9748` connects to the
+`ZedBoard <https://www.avnet.com/wps/portal/us/products/avnet-boards/
+avnet-board-families/zedboard/>`_ via the FMC LPC connector (P1 on the
+evaluation board, FMC on the ZedBoard). Before inserting the evaluation
+board, set VADJ to 3.3 V and configure the ZedBoard for SD card boot.
+
+The :adi:`EVAL-AD9740`, :adi:`EVAL-AD9742`, :adi:`EVAL-AD9744` or
+:adi:`EVAL-AD9748` can also be controlled with the :adi:`EVAL-SDP-H1` controller
+board and the :adi:`ACE` software, without any FPGA or Linux system.
+
+ZedBoard + EVAL-AD974X
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+  .. figure:: ../images/ad9744_zed.jpeg
+     :alt: ZedBoard with EVAL-AD9744 inserted into the FMC LPC connector
+     :width: 800
+
+     ZedBoard with EVAL-AD974X hardware setup
+
+Go to :ref:`the quick start guide <eval-ad974x fmc ebz quickstart zed>`.
+
+SDP-H1 + EVAL-AD974X + ACE
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+  .. figure:: ../images/ad9744_sdp_h1.jpeg
+     :alt: AD9744-FMC-EBZ Evaluation Board with SDP-H1
+     :width: 800
+
+     AD9744-FMC-EBZ Evaluation Board with SDP-H1.
+
+Go to :ref:`the quick start guide <eval-ad974x fmc ebz quickstart sdp-h1-ace>`.