Add HSA-based launcher

[ypapadop-amd]

No description provided.

[github-actions]

Remaining comments which cannot be posted as a review comment to avoid GitHub Rate Limit

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Triton-XDNA/amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.cpp

Line 472 in 26a5bed

if (!b.va) return;

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Triton-XDNA/amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.cpp

Line 486 in 26a5bed

if (!errbuf || errbuf_len == 0) return;

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Triton-XDNA/amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.cpp

Line 492 in 26a5bed

} // namespace

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Triton-XDNA/amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.cpp

Lines 494 to 496 in 26a5bed

	extern "C" triton_npu_hsa_program_t triton_npu_hsa_prepare(
	const char *pdi_path, const char *insts_path, char *errbuf,
	size_t errbuf_len) {

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Triton-XDNA/amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.cpp

Line 500 in 26a5bed

write_err(errbuf, errbuf_len, std::string("HSA prepare failed: ") + e.what());

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Triton-XDNA/amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.cpp

Line 514 in 26a5bed

write_err(errbuf, errbuf_len, std::string("HSA dispatch failed: ") + e.what());

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[clang-format] _{reported by reviewdog 🐶}

Triton-XDNA/amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.h

Line 38 in 26a5bed

char *errbuf, size_t errbuf_len);

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Triton-XDNA/amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.h

Line 44 in 26a5bed

// message written to errbuf). num_tensors must be <= TRITON_NPU_HSA_MAX_KERNARGS.

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Triton-XDNA/amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.h

Line 51 in 26a5bed

} // extern "C"

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Triton-XDNA/amd_triton_npu/backend/include/npu_dispatch_common.h

Lines 14 to 15 in 26a5bed

	// Result of resolving a kernel pointer argument: the raw device/host address and
	// whether resolution succeeded (a Python error is set when `valid` is false).

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[clang-format] _{reported by reviewdog 🐶}

Triton-XDNA/amd_triton_npu/backend/include/npu_dispatch_common.h

Lines 49 to 50 in 26a5bed

	PyErr_SetString(PyExc_TypeError,
	"data_ptr method of Pointer object must return 64-bit int");

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[clang-format] _{reported by reviewdog 🐶}

Triton-XDNA/amd_triton_npu/backend/include/npu_dispatch_common.h

Lines 58 to 59 in 26a5bed

	PyErr_SetString(PyExc_TypeError,
	"Pointer argument must be either uint64 or have data_ptr method");

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[clang-format] _{reported by reviewdog 🐶}

Triton-XDNA/amd_triton_npu/backend/include/npu_dispatch_common.h

Lines 110 to 111 in 26a5bed

	// Size in bytes of a single element of a tensor-like object (obj.dtype.itemsize).
	// Returns -1 and sets/print a Python error on failure.

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[clang-format] _{reported by reviewdog 🐶}

Triton-XDNA/amd_triton_npu/backend/include/npu_dispatch_common.h

Line 113 in 26a5bed

if (!obj) return -1;

[Copilot]

Pull request overview

This PR adds an HSA/ROCR-based launch runtime as an alternative to XRT for the AMD NPU Triton backend, including a shared HSA runtime library and a per-signature HSA launcher path, plus configuration/docs updates to select the runtime.

Changes:

• Add a shared HSA runtime (libtriton_npu_hsa.so) and an HSA launcher generator that dispatches via the ROCR AIE agent path.
• Introduce runtime selection (xrt vs hsa) via NPUDriver(...) and AMD_TRITON_NPU_RUNTIME, and force pdi output when using HSA.
• Refactor common launcher codegen helpers and update packaging/docs accordingly.

Reviewed changes

Copilot reviewed 9 out of 9 changed files in this pull request and generated 6 comments.

Show a summary per file

File	Description
setup.py	Copy backend Python modules more generically into installed Triton backend.
README.md	Document runtime selection (XRT vs HSA) and HSA requirements/usage.
amd_triton_npu/backend/include/npu_dispatch_common.h	New shared CPython glue helpers used by both XRT and HSA launchers.
amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.h	New C ABI for a shared HSA/ROCR dispatch runtime.
amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.cpp	New shared HSA runtime implementation (queue, signal, vmem pooling, program cache).
amd_triton_npu/backend/hsa_launcher.py	New per-signature CPython launcher generator for the HSA runtime.
amd_triton_npu/backend/driver.py	Add runtime selection, build/link profile handling, and shared codegen refactors.
amd_triton_npu/backend/config.py	Add AMD_TRITON_NPU_RUNTIME config plumbing and validation.
amd_triton_npu/backend/codegen.py	New shared codegen utilities for launchers (types/signature/actual-sizes).

Comments suppressed due to low confidence (4)

amd_triton_npu/backend/include/npu_dispatch_common.h:60

• getPointer() sets a TypeError for unsupported pointer arguments but returns with ptr_info.valid still true, so callers may continue as if resolution succeeded.

  PyErr_SetString(PyExc_TypeError,
                  "Pointer argument must be either uint64 or have data_ptr method");
  return ptr_info;

amd_triton_npu/backend/include/npu_dispatch_common.h:56

• getPointer() does not handle PyLong_AsUnsignedLongLong(ret) failures from data_ptr() (e.g. negative return value). That can leave a Python error set while returning ptr_info.valid=true.

    ptr_info.dev_ptr = reinterpret_cast<void *>(PyLong_AsUnsignedLongLong(ret));
    Py_DECREF(ret);
    return ptr_info;

amd_triton_npu/backend/include/npu_dispatch_common.h:91

• getNumElements() uses PyErr_Print() in loop error paths, which clears the underlying exception and can lead to returning NULL without an active Python exception.

    PyObject *dim_obj = PySequence_GetItem(shape, i);
    if (!dim_obj) {
      Py_DECREF(shape);
      PyErr_Print();
      return -1;

amd_triton_npu/backend/hsa_launcher.py:167

• The generated C++ launcher calls launch_exit_hook but does not Py_DECREF the return value on success, leaking a reference per dispatch.

  if (launch_exit_hook != Py_None) {{
    PyObject* hook_args = Py_BuildValue("(O)", launch_metadata);
    PyObject* ret = PyObject_CallObject(launch_exit_hook, hook_args);
    Py_DECREF(hook_args);
    if (!ret) return NULL;
  }}

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[github-actions]

Remaining comments which cannot be posted as a review comment to avoid GitHub Rate Limit

clang-format

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[clang-format] _{reported by reviewdog 🐶}

Triton-XDNA/amd_triton_npu/backend/include/HsaRuntime/HsaRuntime.h

Line 51 in acdd93b

} // extern "C"

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[clang-format] _{reported by reviewdog 🐶}

Triton-XDNA/amd_triton_npu/backend/include/npu_dispatch_common.h

Lines 14 to 15 in acdd93b

	// Result of resolving a kernel pointer argument: the raw device/host address and
	// whether resolution succeeded (a Python error is set when `valid` is false).

---

[clang-format] _{reported by reviewdog 🐶}

Triton-XDNA/amd_triton_npu/backend/include/npu_dispatch_common.h

Lines 49 to 50 in acdd93b

	PyErr_SetString(PyExc_TypeError,
	"data_ptr method of Pointer object must return 64-bit int");

---

[clang-format] _{reported by reviewdog 🐶}

Triton-XDNA/amd_triton_npu/backend/include/npu_dispatch_common.h

Lines 58 to 59 in acdd93b

	PyErr_SetString(PyExc_TypeError,
	"Pointer argument must be either uint64 or have data_ptr method");

---

[clang-format] _{reported by reviewdog 🐶}

Triton-XDNA/amd_triton_npu/backend/include/npu_dispatch_common.h

Lines 110 to 111 in acdd93b

	// Size in bytes of a single element of a tensor-like object (obj.dtype.itemsize).
	// Returns -1 and sets/print a Python error on failure.

---

[clang-format] _{reported by reviewdog 🐶}

Triton-XDNA/amd_triton_npu/backend/include/npu_dispatch_common.h

Line 113 in acdd93b

if (!obj) return -1;

[Copilot]

Pull request overview

Copilot reviewed 10 out of 10 changed files in this pull request and generated 2 comments.

[astrelsky]

I'm assuming you can just use TheRock wheels and the libhsa-runtime64.so provided there?

What is the Windows equivalent? (rocr is supported on Windows).

Has IRON been checked for a similar situation where it may benefit from the hsa based launcher?

[ypapadop-amd]

Thank you for your review.

I'm assuming you can just use TheRock wheels and the libhsa-runtime64.so provided there?

Yes, I'll add support for the wheels. I'll also clarify it in the instructions; people won't have to deal with building ROCR.

What is the Windows equivalent? (rocr is supported on Windows).

ROCR will need NPU driver integration for Windows. xdna-driver is Linux-only.

Has IRON been checked for a similar situation where it may benefit from the hsa based launcher?

This is an XRT integration inefficiency, not necessarily fundamental, although ROCR shows different performance characteristics (more on this at a later time). If XRT integration is similar to ROCR's, then performance should be identical.

[erwei-xilinx]

LGTM! Thanks for working on this!