COL216 - Computer Architecture
The simulated cache will have the general functionality, but with a new Replacement Policy that works as follows.
Each Cache Set is divided into two groups:
- One group contains the HIGH PRIORITY lines of the set
- The other group contains the LOW PRIORITY lines of the set
- If a line is accessed again after the initial access that fetches it into the cache, it is promoted to the HIGH PRIORITY group.
- If a line is not accessed for sufficiently long (T cache accesses) after being moved to the HIGH PRIORITY group, it is moved to the LOW PRIORITY group.
- Within a priority group, the Least Recently Used policy may be used to manage the lines.
- Assumption: A cache line is moved to Higher Priority level unless it is accessed (Even if the Higher Priority level has empty blocks and the Lower Priority level is full).
- Cache Size
- Cache line/block size
- Cache associativity
- The value of T
- A sequence of memory access requests: Memory address, R or W (for Read or Write), and Data (if Write)
- The complete content of the cache (Data, Tag, and Control bits of every cache line) in each Way after the memory access sequence is complete.
- Cache statistics:
- Number of Accesses
- Number of Reads, Read Hits, and Read Misses
- Number of Writes, Write Hits, and Write Misses
- Hit Ratio