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ram: remove explicit power_pin/ground_pin args from 2r1w test tcl files #10832

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Merged
eder-matheus merged 2 commits into from
Jul 7, 2026
Merged

ram: remove explicit power_pin/ground_pin args from 2r1w test tcl files #10832

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0dde1cf
ram: remove explicit power_pin/ground_pin args from 2r1w test tcl files
tnguy19 Jul 6, 2026
8ae3311
ram:fix typo in 8x8_2r1w_sky130 tcl file
tnguy19 Jul 7, 2026
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11 changes: 10 additions & 1 deletion src/ram/test/BUILD
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Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,10 @@ package(features = ["layering_check"])

# From CMakeLists.txt or_integration_tests(TESTS
COMPULSORY_TESTS = [
"make_8x8_sky130",
"make_7x7_2r1w_nangate45",
"make_7x7_nangate45",
"make_8x8_2r1w_sky130",
"make_8x8_sky130",
]

PASSFAIL_TESTS = [
Expand Down Expand Up @@ -49,12 +51,19 @@ filegroup(
test_name + ".*",
],
) + {
"make_7x7_2r1w_nangate45": [
"make_7x7_2r1w_nangate45_behavioral.vok",
"Nangate45/Nangate45.lef",
"Nangate45/Nangate45_tech.lef",
"Nangate45/Nangate45_typ.lib",
],
"make_7x7_nangate45": [
"make_7x7_nangate45_behavioral.vok",
"Nangate45/Nangate45.lef",
"Nangate45/Nangate45_tech.lef",
"Nangate45/Nangate45_typ.lib",
],
"make_8x8_2r1w_sky130": ["make_8x8_2r1w_sky130_behavioral.vok"],
"make_8x8_sky130": ["make_8x8_sky130_behavioral.vok"],
}.get(test_name, []),
)
Expand Down
56 changes: 28 additions & 28 deletions src/ram/test/make_7x7_2r1w_nangate45.lefok
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Original file line number Diff line number Diff line change
Expand Up @@ -265,6 +265,34 @@ MACRO RAM7x7
RECT 43.705 11.06 43.845 11.2 ;
END
END Q1[6]
PIN VDD
DIRECTION INOUT ;
USE POWER ;
PORT
LAYER metal4 ;
RECT 49.43 11.06 49.57 11.2 ;
RECT 49.43 0 49.57 0.14 ;
RECT 40.43 11.06 40.57 11.2 ;
RECT 40.43 0 40.57 0.14 ;
RECT 31.43 11.06 31.57 11.2 ;
RECT 31.43 0 31.57 0.14 ;
RECT 22.43 11.06 22.57 11.2 ;
RECT 22.43 0 22.57 0.14 ;
RECT 13.43 11.06 13.57 11.2 ;
RECT 13.43 0 13.57 0.14 ;
RECT 4.43 11.06 4.57 11.2 ;
RECT 4.43 0 4.57 0.14 ;
LAYER metal1 ;
RECT 56.55 9.76 56.62 9.84 ;
RECT 0 9.76 0.07 9.84 ;
RECT 56.55 6.96 56.62 7.04 ;
RECT 0 6.96 0.07 7.04 ;
RECT 56.55 4.16 56.62 4.24 ;
RECT 0 4.16 0.07 4.24 ;
RECT 56.55 1.36 56.62 1.44 ;
RECT 0 1.36 0.07 1.44 ;
END
END VDD
PIN VSS
DIRECTION INOUT ;
USE GROUND ;
Expand Down Expand Up @@ -295,34 +323,6 @@ MACRO RAM7x7
RECT 0 -0.04 0.07 0.04 ;
END
END VSS
PIN VDD
DIRECTION INOUT ;
USE POWER ;
PORT
LAYER metal4 ;
RECT 49.43 11.06 49.57 11.2 ;
RECT 49.43 0 49.57 0.14 ;
RECT 40.43 11.06 40.57 11.2 ;
RECT 40.43 0 40.57 0.14 ;
RECT 31.43 11.06 31.57 11.2 ;
RECT 31.43 0 31.57 0.14 ;
RECT 22.43 11.06 22.57 11.2 ;
RECT 22.43 0 22.57 0.14 ;
RECT 13.43 11.06 13.57 11.2 ;
RECT 13.43 0 13.57 0.14 ;
RECT 4.43 11.06 4.57 11.2 ;
RECT 4.43 0 4.57 0.14 ;
LAYER metal1 ;
RECT 56.55 9.76 56.62 9.84 ;
RECT 0 9.76 0.07 9.84 ;
RECT 56.55 6.96 56.62 7.04 ;
RECT 0 6.96 0.07 7.04 ;
RECT 56.55 4.16 56.62 4.24 ;
RECT 0 4.16 0.07 4.24 ;
RECT 56.55 1.36 56.62 1.44 ;
RECT 0 1.36 0.07 1.44 ;
END
END VDD
OBS
LAYER metal1 ;
RECT 0 -0.07 56.62 11.27 ;
Expand Down
2 changes: 1 addition & 1 deletion src/ram/test/make_7x7_2r1w_nangate45.ok
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Original file line number Diff line number Diff line change
Expand Up @@ -115,4 +115,4 @@
[INFO DRT-0179] Init gr pin query.
No differences found.
No differences found.
No differences found.
No differences found.
2 changes: 0 additions & 2 deletions src/ram/test/make_7x7_2r1w_nangate45.tcl
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Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,6 @@ generate_ram \
-r_ports 2 \
-w_ports 1 \
-storage_cell DFF_X1 \
-power_pin VDD \
-ground_pin VSS \
-routing_layer {metal1 0.08} \
-ver_layer {metal4 0.14 9} \
-hor_layer {metal3 0.08 8} \
Expand Down
54 changes: 27 additions & 27 deletions src/ram/test/make_8x8_2r1w_sky130.lefok
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Original file line number Diff line number Diff line change
Expand Up @@ -289,33 +289,6 @@ MACRO RAM8x8
RECT 120.68 23.995 120.82 24.48 ;
END
END Q1[7]
PIN VSS
DIRECTION INOUT ;
USE GROUND ;
PORT
LAYER met3 ;
RECT 154.72 19.76 155.02 20.24 ;
RECT 0 19.76 0.3 20.24 ;
LAYER met2 ;
RECT 119.76 24.34 120.24 24.48 ;
RECT 119.76 0 120.24 0.14 ;
RECT 79.76 24.34 80.24 24.48 ;
RECT 79.76 0 80.24 0.14 ;
RECT 39.76 24.34 40.24 24.48 ;
RECT 39.76 0 40.24 0.14 ;
LAYER met1 ;
RECT 154.88 21.52 155.02 22 ;
RECT 0 21.52 0.14 22 ;
RECT 154.88 16.08 155.02 16.56 ;
RECT 0 16.08 0.14 16.56 ;
RECT 154.88 10.64 155.02 11.12 ;
RECT 0 10.64 0.14 11.12 ;
RECT 154.88 5.2 155.02 5.68 ;
RECT 0 5.2 0.14 5.68 ;
RECT 154.88 -0.24 155.02 0.24 ;
RECT 0 -0.24 0.14 0.24 ;
END
END VSS
PIN VDD
DIRECTION INOUT ;
USE POWER ;
Expand Down Expand Up @@ -345,6 +318,33 @@ MACRO RAM8x8
RECT 0 2.48 0.14 2.96 ;
END
END VDD
PIN VSS
DIRECTION INOUT ;
USE GROUND ;
PORT
LAYER met3 ;
RECT 154.72 19.76 155.02 20.24 ;
RECT 0 19.76 0.3 20.24 ;
LAYER met2 ;
RECT 119.76 24.34 120.24 24.48 ;
RECT 119.76 0 120.24 0.14 ;
RECT 79.76 24.34 80.24 24.48 ;
RECT 79.76 0 80.24 0.14 ;
RECT 39.76 24.34 40.24 24.48 ;
RECT 39.76 0 40.24 0.14 ;
LAYER met1 ;
RECT 154.88 21.52 155.02 22 ;
RECT 0 21.52 0.14 22 ;
RECT 154.88 16.08 155.02 16.56 ;
RECT 0 16.08 0.14 16.56 ;
RECT 154.88 10.64 155.02 11.12 ;
RECT 0 10.64 0.14 11.12 ;
RECT 154.88 5.2 155.02 5.68 ;
RECT 0 5.2 0.14 5.68 ;
RECT 154.88 -0.24 155.02 0.24 ;
RECT 0 -0.24 0.14 0.24 ;
END
END VSS
OBS
LAYER li1 ;
RECT 0 -0.24 155.02 24.72 ;
Expand Down
2 changes: 1 addition & 1 deletion src/ram/test/make_8x8_2r1w_sky130.ok
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Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
[INFO RAM-0024] Behavioral Verilog written for RAM8x8
[INFO PDN-0001] Inserting grid: ram_grid
[INFO PPL-0067] Restrict pins [ clk we[0] D[0] Q0[0] Q1[0] ... ] to region 0.00u-155.02u at the TOP edge.
[INFO PPL-0067] Restrict pins [ addr_w[0][0] addr_w[0][1] addr_w[0][2] addr_r[0][0] addr_r[0][1] ... ] to region 0.00u-24.48u at the RIGHT edge.
[INFO PPL-0067] Restrict pins [ addr_w[0] addr_w[1] addr_w[2] addr_r0[0] addr_r0[1] ... ] to region 0.00u-24.48u at the RIGHT edge.
[INFO PPL-0001] Number of available slots 364
[INFO PPL-0002] Number of I/O 35
[INFO PPL-0003] Number of I/O w/sink 35
Expand Down
4 changes: 1 addition & 3 deletions src/ram/test/make_8x8_2r1w_sky130.tcl
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ read_liberty sky130hd/sky130_fd_sc_hd__tt_025C_1v80.lib
read_lef sky130hd/sky130hd.tlef
read_lef sky130hd/sky130_fd_sc_hd_merged.lef

set behavioral_file [make_result_file make_8x8_1rw1r_behavioral.v]
set behavioral_file [make_result_file make_8x8_2rw1r_behavioral.v]

generate_ram \
-mask_size 8 \
Expand All @@ -16,8 +16,6 @@ generate_ram \
-r_ports 2 \
-w_ports 1 \
-storage_cell sky130_fd_sc_hd__dfxtp_1 \

@gemini-code-assist gemini-code-assist Bot Jul 6, 2026

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medium

In make_8x8_2r1w_sky130.tcl, the behavioral file name defined on line 10 (outside the diff) is set to make_8x8_1rw1r_behavioral.v:

set behavioral_file [make_result_file make_8x8_1rw1r_behavioral.v]

However, this test is for make_8x8_2r1w_sky130, and the golden file compared on line 36 is make_8x8_2r1w_sky130_behavioral.vok. This copy-paste inconsistency makes the test confusing to maintain. It is highly recommended to update line 10 to use make_8x8_2r1w_sky130_behavioral.v instead.

@rovinski rovinski Jul 7, 2026

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Please fix

-power_pin VPWR \
-ground_pin VGND \
-routing_layer {met1 0.48} \
-ver_layer {met2 0.48 40} \
-hor_layer {met3 0.48 20} \
Expand Down
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