cleanup: refresh public README and repo structure

[synqing]

Summary

• Replaces the overclaiming root README with a conservative public README scoped to tooling, MCP servers, and preserved prototypes.
• Adds Apache-2.0 LICENSE per the approved Stage 2 metadata ruling.
• Moves loose root Python and shell prototype files into tools/elite-pcb-designer/legacy-pipeline/.
• Removes duplicate root datasheet PDFs, tracked Python bytecode, and the remaining public product-design docs/BOM from HEAD under the existing accept-head-only sensitive-content ruling.

Validation

• git diff --cached --check
• root staged tree check: root files are .gitignore, LICENSE, README.md only
• tracked bytecode count: 0
• root .py/.sh/.pdf count: 0
• sensitive doc path count for docs/prd, docs/bom, DESIGN_VALIDATION_SUMMARY, MANUFACTURING_PACKAGE, ERRATA_REV-A_VALIDATED: 0
• LC_ALL=C grep for non-ASCII in README.md and LICENSE: no output
• python3 -m py_compile for moved legacy-pipeline Python files
• python3 -m unittest test_ipc_standards test_component_placement: 58 tests passed, 9 skipped; KiCad pcbnew missing warning expected in this environment

Known residual

• python3 -m unittest test_ipc_standards test_component_placement test_elite_pcb_designer fails in test_elite_pcb_designer because the preserved legacy tests expect an older ElitePCBDesigner API. This is pre-existing prototype drift; this PR does not refactor that prototype.
• docs/internal/legacy-root still needs content review before amplification. I did not delete that whole reference pile in this PR.

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Review details

⚙️ Run configuration

Configuration used: defaults

Review profile: CHILL

Plan: Pro

Run ID: 3d2a6188-d1c0-4d2a-860f-9a49cf84129d

📥 Commits

Reviewing files that changed from the base of the PR and between 9e1a146 and 92a6121.

⛔ Files ignored due to path filters (13)

• agent/__pycache__/__init__.cpython-312.pyc is excluded by !**/*.pyc
• agent/configs/__pycache__/__init__.cpython-312.pyc is excluded by !**/*.pyc
• agent/dfm/__pycache__/__init__.cpython-312.pyc is excluded by !**/*.pyc
• agent/drivers/__pycache__/__init__.cpython-312.pyc is excluded by !**/*.pyc
• agent/impedance/__pycache__/__init__.cpython-312.pyc is excluded by !**/*.pyc
• agent/kicad/__pycache__/__init__.cpython-312.pyc is excluded by !**/*.pyc
• agent/orchestrator/__pycache__/__init__.cpython-312.pyc is excluded by !**/*.pyc
• agent/routing/__pycache__/__init__.cpython-312.pyc is excluded by !**/*.pyc
• agent/thermal/__pycache__/__init__.cpython-312.pyc is excluded by !**/*.pyc
• docs/bom/K1_Lightwave_RevA_LCSC_Default.csv is excluded by !**/*.csv
• esp-hardware-design-guidelines-en-master-esp32s3.pdf is excluded by !**/*.pdf
• esp32-s3_datasheet_en.pdf is excluded by !**/*.pdf
• mcp/mcp-rag/__pycache__/server.cpython-312.pyc is excluded by !**/*.pyc

📒 Files selected for processing (35)

• .github/workflows/kibot.yml
• LICENSE
• README.md
• docs/DESIGN_VALIDATION_SUMMARY.md
• docs/ERRATA_REV-A_VALIDATED.md
• docs/MANUFACTURING_PACKAGE.md
• docs/prd/01-product-brief.md
• docs/prd/02-hardware-prd.md
• docs/prd/03-validation-plan.md
• tools/elite-pcb-designer/legacy-pipeline/automated_routing.py
• tools/elite-pcb-designer/legacy-pipeline/component_placement.py
• tools/elite-pcb-designer/legacy-pipeline/demo_elite_pcb_designer.py
• tools/elite-pcb-designer/legacy-pipeline/demo_placement.py
• tools/elite-pcb-designer/legacy-pipeline/design_preparation.py
• tools/elite-pcb-designer/legacy-pipeline/design_validation.py
• tools/elite-pcb-designer/legacy-pipeline/elite_pcb_designer.py
• tools/elite-pcb-designer/legacy-pipeline/elite_pcb_designer_cli.py
• tools/elite-pcb-designer/legacy-pipeline/example_k1_full_design.py
• tools/elite-pcb-designer/legacy-pipeline/example_k1_routing.py
• tools/elite-pcb-designer/legacy-pipeline/freerouting_config.py
• tools/elite-pcb-designer/legacy-pipeline/ipc_standards_library.py
• tools/elite-pcb-designer/legacy-pipeline/k1_board_automation_template.py
• tools/elite-pcb-designer/legacy-pipeline/populate_board_from_netlist.py
• tools/elite-pcb-designer/legacy-pipeline/populate_board_manual.py
• tools/elite-pcb-designer/legacy-pipeline/run_elite_designer.py
• tools/elite-pcb-designer/legacy-pipeline/run_placement_demo.sh
• tools/elite-pcb-designer/legacy-pipeline/run_placement_test.sh
• tools/elite-pcb-designer/legacy-pipeline/test_automated_routing.py
• tools/elite-pcb-designer/legacy-pipeline/test_component_placement.py
• tools/elite-pcb-designer/legacy-pipeline/test_design_preparation.py
• tools/elite-pcb-designer/legacy-pipeline/test_design_validation.py
• tools/elite-pcb-designer/legacy-pipeline/test_elite_pcb_designer.py
• tools/elite-pcb-designer/legacy-pipeline/test_ipc_standards.py
• tools/elite-pcb-designer/legacy-pipeline/validate_k1_lightwave.py
• tools/elite-pcb-designer/legacy-pipeline/validation_report_template.py

✨ Finishing Touches

🧪 Generate unit tests (beta)

• Create PR with unit tests
• Commit unit tests in branch cleanup/readme-licence-settings

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