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[AMD] Update DSR1 MI355X SGLang image / [AMD] 更新 DSR1 MI355X SGLang 镜像 #2435

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[AMD] Update DSR1 MI355X SGLang image / [AMD] 更新 DSR1 MI355X SGLang 镜像 #2435

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2 changes: 1 addition & 1 deletion configs/amd-master.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -983,7 +983,7 @@ dsr1-fp4-mi355x-sglang-disagg:
- "DECODE_MTP_SIZE=0"

dsr1-fp4-mi355x-sglang-disagg-8k1k-mtp:
image: lmsysorg/sglang-rocm:v0.5.12.post1-rocm720-mi35x-20260529
image: lmsysorg/sglang-rocm:v0.5.16-rocm720-mi35x-20260729
model: amd/DeepSeek-R1-0528-MXFP4-v2
model-prefix: dsr1
runner: mi355x-disagg
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6 changes: 6 additions & 0 deletions perf-changelog.yaml
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Expand Up @@ -5355,3 +5355,9 @@
- "Apply the accuracy-gated Kimi-K2.5 MXFP4 settings: tuned AITER MXFP4 MoE, fused shared experts, FP8 KV cache, block size 16, 16384 batched tokens, 512 sequences, async scheduling, gpu-memory-utilization 0.85 (headroom for CUDA-graph capture on MI355X), and the AITER BF16 GEMM path"
- "Extend the TP4 and TP8 8k1k concurrency sweep from 64 to 128 (1k1k deprecated per #2263)"
pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2213

- config-keys:
- dsr1-fp4-mi355x-sglang-disagg-8k1k-mtp
description:
- "Update the SGLang ROCm image to v0.5.16-rocm720-mi35x-20260729, which includes the AITER MLA LDS synchronization fix."
pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2435
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