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EnDat encoder module added - #263

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gi4you wants to merge 1 commit into
PandABlocks:mainfrom
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EnDat encoder module added#263
gi4you wants to merge 1 commit into
PandABlocks:mainfrom
gi4you:feature/my-updated-module

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@gi4you

@gi4you gi4you commented Feb 19, 2026

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Added below files for the EnDat encoder modules:
I tested all modules with Power PMAC and HEIDENHAIN ECN 425 2048 encoder: endat2_master.vhd, endat2_sniffer.vhd, endat_slave.vhd
common/hdl/encoders/encoders.vhd
common/hdl/encoders/endat2_master.vhd
common/hdl/encoders/endat2_sniffer.vhd
common/hdl/encoders/endat_clock_gen.vhd
common/hdl/encoders/endat_crc5.vhd
common/hdl/encoders/endat_slave.vhd
modules/inenc/inenc.block.ini

@tomtrafford tomtrafford left a comment

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Sorry it's taken me a while to have a look at this, I'm currently waiting on some hardware to be ready to do some testing at Diamond. I've just noticed a small deviation from our current style convention.

reset_i : in std_logic;

-- Configuration
BITS : in std_logic_vector(7 downto 0); -- position bits (typically 25)

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Can you add _i suffixes for all input signals to the entity and _o suffixes to output signals (and _io to inout signals). It's a style guide we brought in and are trying to enforce on contributions going forwards. I think you've mostly done this, but there's a few places it hasn't been done.

@tomtrafford

tomtrafford commented Mar 24, 2026

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From doing some testing at Diamond, these change work for control mode, but it goes into an error state when using Monitor mode.

@tomtrafford

tomtrafford commented Jun 4, 2026

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@gi4you did this work for you in monitor mode (sniffer)?

Can you provide your testbenches you used?

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3 participants