[Operator Mechanism]Add 64-bit strided BatchGEMM dispatch - #79697
[Operator Mechanism]Add 64-bit strided BatchGEMM dispatch#79697feixi139 wants to merge 2 commits into
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| 序号 | 位置 | 优先级 | 规则来源 | 状态 |
|---|---|---|---|---|
| 1 | LIBXSMM 维度参数 | 仓库规则:算子整数宽度与构建兼容性 | ✅ |
| template <typename T> | ||
| void Blas<CPUContext>::MatMul( | ||
| const int M, const int N, const int K, const T *A, const T *B, T *C) const { | ||
| int64_t M, int64_t N, int64_t K, const T *A, const T *B, T *C) const { |
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已在当前提交中将 M/N/K 通过 detail::to_blas_int 转为独立的 libxsmm_blasint 局部变量,并保留范围检查;LIBXSMM 路径的指针类型问题已修复。
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日志分析报告失败的测试 case: 根本原因分析:
修复建议:
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PR Category
Operator Mechanism
PR Types
Bug fixes
Description
当前
MatMul和BatchedGEMM的部分接口及实现仍会将M/N/K/batchCount收窄为 32 位整数,导致大于INT_MAX的维度无法使用 CUDA 12.3 提供的 64 位 cuBLAS 接口,部分路径还可能基于已截断的维度计算 leading dimension。本 PR 主要包含以下改动:
MatMul和 pointer-arrayBatchedGEMM的维度参数调整为int64_t,保证 MatMul 广播及 BLAS 调用链能够完整传递 64 位维度。_64动态加载符号及调用封装。当相关维度超过INT_MAX时,在 Linux CUDA 12.3 及以上环境分发到对应的 64 位 cuBLAS API;其他情况继续使用原有 32 位接口。FLAGS_gemm_use_half_precision_compute_type时 FP16alpha/beta的类型不匹配问题,避免 BLAS 按 FP16 读取 float 标量而产生错误结果。ldc不满足 cuBLAS 要求而无法覆盖目标 shape 的N == 1BatchedGEMM 快速路径,以及重复、不可达的维度检查。MatMul/BatchedGEMM的int64_t接口以及 CPU 对不支持维度的异常处理。是否引起精度变化
否