Extending-a-32-bit-CPU-Instruction-Set

A University of the Philippines Diliman Projects that focuses on learning system verilog

For this project, we were asked to modify the processor to create 5 new instructions:

EDA playground was used to do this project.

Please see the documentation file for more information and how I solved it.

Kindly email me if you want to see the project specifications.

Carl David B. Ragunton <cbragunton@up.edu.ph>

University of the Philippines Diliman

2nd Semester A.Y. 2021-2022

Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
Documentation.pdf		Documentation.pdf
README.md		README.md
adder.sv		adder.sv
alu.sv		alu.sv
aludec.sv		aludec.sv
controller.sv		controller.sv
datapath.sv		datapath.sv
dmem.sv		dmem.sv
flopr.sv		flopr.sv
imem.sv		imem.sv
maindec.sv		maindec.sv
memfile.mem		memfile.mem
mips.sv		mips.sv
mux2.sv		mux2.sv
regfile.sv		regfile.sv
signext.sv		signext.sv
sl2.sv		sl2.sv
testbench.sv		testbench.sv
top.sv		top.sv

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