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pll primitives

Status: Open.

#34 In Nic30/hwtLib;

· Nic30 opened on Feb 17, 2021

Tests for MultiConfigUnitWrapper with hierarchical interfaces

Status: Open.

#31 In Nic30/hwtLib;

· Nic30 opened on Jan 25, 2021

Merge Axi_r/wDatapump, StructReader/Write, ArrayItemGetter and other bus frame logic

Status: Open.

#30 In Nic30/hwtLib;

· Nic30 opened on Jan 11, 2021

Tests for top of AxiInterconnectMatrix

Status: Open.

#29 In Nic30/hwtLib;

· Nic30 opened on Dec 4, 2020

·  

v3.0

DSP mapper examples

Status: Open.

#28 In Nic30/hwtLib;

· Nic30 opened on Nov 26, 2020

·  

v3.0

Intel DSP primitives

Status: Open.

#26 In Nic30/hwtLib;

· Nic30 opened on Nov 26, 2020

·  

v3.0

AXI cache + LSU verification of whole complex

Status: Open.

#25 In Nic30/hwtLib;

· Nic30 opened on Nov 26, 2020

·  

v3.0

Examples do not work out of the box (automatic test against pip required for check if new release of dependency is required)

Status: Open.

#23 In Nic30/hwtLib;

· philipaxer opened on Jul 30, 2020

·  

v3.0

RLE-encoding for DebugBusMonitor

Status: Open.

#22 In Nic30/hwtLib;

· Nic30 opened on Apr 10, 2020

AXI interconnect: variant with customizable topology

Status: Open.

#21 In Nic30/hwtLib;

· Nic30 opened on Jan 7, 2020

ETH MAC SFP/RGMII example

Status: Open.

#18 In Nic30/hwtLib;

· Nic30 opened on Jan 7, 2020

OV7670 or other common cammera example

Status: Open.

#17 In Nic30/hwtLib;

· Nic30 opened on Jan 7, 2020