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base: ship both ACPI tables (P-states + C-states)
Testing with SSDT-PST alone showed cpuidle come up empty, so SSDT-CST does supply the C-states and belongs in the package. The 'Could not resolve symbol \_PR.C000' messages are not caused by it — they still appear with the table removed, so they come from the board's own firmware.
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Lines changed: 132 additions & 6 deletions

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‎scripts/build-debs-ci.sh‎

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@@ -98,6 +98,8 @@ put $P 0644 system/etc/skel/.config/conky/skillfish.conf etc/skel/.
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put $P 0755 system/usr/local/bin/skillfish-acpi-pstates usr/local/bin/skillfish-acpi-pstates
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put $P 0644 system/usr/share/skillfish/acpi/SSDT-PST.aml usr/share/skillfish/acpi/SSDT-PST.aml
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put $P 0644 system/usr/share/skillfish/acpi/SSDT-PST.dsl usr/share/skillfish/acpi/SSDT-PST.dsl
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put $P 0644 system/usr/share/skillfish/acpi/SSDT-CST.aml usr/share/skillfish/acpi/SSDT-CST.aml
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put $P 0644 system/usr/share/skillfish/acpi/SSDT-CST.dsl usr/share/skillfish/acpi/SSDT-CST.dsl
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ctrl $P "systemd, libnotify-bin, python3, cpio" "SkillFishOS base - hardware watchdog + freeze detector + 8-core unlock"
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# base needs its own postinst: enable the watchdog and the freeze check.
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# NOTE: core-unlock is only *enabled* (never --now): it warm-reboots the machine when

‎system/usr/local/bin/skillfish-acpi-pstates‎

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@@ -11,16 +11,18 @@
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# the board still peaks at ~3500 with the table loaded). What it buys is idle: the
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# cores drop to 800 MHz instead of sitting near 1400, which frees thermal budget.
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#
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# Table from mendesrr/bc250-acpi-fix-updated-8c (covers P000..P00F = 16 threads).
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# Only SSDT-PST is installed: the companion SSDT-CST targets \_PR.C000..C009, which
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# do not exist in this DSDT, so it only produced ACPI BIOS errors while the kernel's
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# own C-states worked anyway.
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# Tables from mendesrr/bc250-acpi-fix-updated-8c (they cover P000..P00F = 16 threads).
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# Both are installed: SSDT-PST gives the P-states, SSDT-CST the idle C-states — tested
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# without CST and cpuidle came up empty, so it does real work here. The
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# "Could not resolve symbol \_PR.C000" messages in dmesg are NOT from these tables:
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# they still appear with CST removed, so they come from the board's own firmware.
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#
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# skillfish-acpi-pstates enable (default)
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# skillfish-acpi-pstates disable
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# skillfish-acpi-pstates status
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set -e
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AML=/usr/share/skillfish/acpi/SSDT-PST.aml
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AMLDIR=/usr/share/skillfish/acpi
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AML="$AMLDIR/SSDT-PST.aml"
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CPIO=/boot/SkillFishOS-acpi.cpio
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GRUBDEF=/etc/default/grub
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ACTION="${1:-enable}"
@@ -53,7 +55,7 @@ case "$ACTION" in
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# the kernel looks for the tables at this exact path inside the early cpio
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tmp=$(mktemp -d)
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mkdir -p "$tmp/kernel/firmware/acpi"
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cp "$AML" "$tmp/kernel/firmware/acpi/"
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cp "$AMLDIR"/SSDT-*.aml "$tmp/kernel/firmware/acpi/"
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(cd "$tmp" && find kernel | cpio -H newc --create --quiet) > "$CPIO"
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rm -rf "$tmp"
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sed -i '/^GRUB_EARLY_INITRD_LINUX_CUSTOM=/d' "$GRUBDEF"

‎system/usr/share/skillfish/acpi/SSDT-CST.aml‎

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‎system/usr/share/skillfish/acpi/SSDT-CST.dsl‎

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// SSDT-P-CST-ALIAS-3S.dsl
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DefinitionBlock ("", "SSDT", 2, "HACK", "P_CST3", 0x00000001)
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{
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// Firmware objects we’re augmenting
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External (\_PR, DeviceObj)
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External (\_PR.P000, ProcessorObj)
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External (\_PR.P001, ProcessorObj)
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External (\_PR.P002, ProcessorObj)
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External (\_PR.P003, ProcessorObj)
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External (\_PR.P004, ProcessorObj)
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External (\_PR.P005, ProcessorObj)
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External (\_PR.P006, ProcessorObj)
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External (\_PR.P007, ProcessorObj)
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External (\_PR.P008, ProcessorObj)
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External (\_PR.P009, ProcessorObj)
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External (\_PR.P00A, ProcessorObj)
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External (\_PR.P00B, ProcessorObj)
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External (\_PR.P00C, ProcessorObj)
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External (\_PR.P00D, ProcessorObj)
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External (\_PR.P00E, ProcessorObj)
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External (\_PR.P00F, ProcessorObj)
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// 3-state C-state package mirroring your Zen2 laptop values
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Method (PCST, 0, NotSerialized)
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{
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Return (Package ()
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{
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0x03, // number of C-states
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// C1: FFixedHW, BitWidth=0x02, BitOffset=0x02, Lat=0x0001, Power=0
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Package ()
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{
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ResourceTemplate ()
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{
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Register (FFixedHW,
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0x02, // Bit Width
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0x02, // Bit Offset
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0x0000000000000000, // Address
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/* AccessSize omitted for FFixedHW */
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)
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},
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0x01, // C1 type
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0x0001, // Latency (us)
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0x00000000 // Power (mW)
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},
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// C2: SystemIO @0x414, AccessSize=1, Lat=0x015E, Power=0
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Package ()
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{
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ResourceTemplate ()
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{
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Register (SystemIO,
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0x08, // Bit Width
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0x00, // Bit Offset
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0x0000000000000414, // Address
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0x01 // Access Size
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)
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},
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0x02, // C2 type
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0x015E, // Latency (us)
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0x00000000 // Power (mW)
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},
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// C3: SystemIO @0x415, AccessSize=1, Lat=0x0190, Power=0
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Package ()
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{
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ResourceTemplate ()
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{
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Register (SystemIO,
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0x08, // Bit Width
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0x00, // Bit Offset
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0x0000000000000415, // Address
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0x01 // Access Size
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)
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},
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0x03, // C3 type
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0x0190, // Latency (us)
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0x00000000 // Power (mW)
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}
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})
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}
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// Add _CST to each vendor processor
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Scope (\_PR.P000) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P001) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P002) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P003) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P004) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P005) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P006) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P007) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P008) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P009) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P00A) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P00B) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P00C) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P00D) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P00E) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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Scope (\_PR.P00F) { Method (_CST, 0, NotSerialized) { Return (PCST()) } }
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// Keep the C000..C00F aliases so other AML resolves cleanly
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Scope (\_PR)
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{
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Alias (\_PR.P000, C000)
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Alias (\_PR.P001, C001)
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Alias (\_PR.P002, C002)
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Alias (\_PR.P003, C003)
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Alias (\_PR.P004, C004)
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Alias (\_PR.P005, C005)
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Alias (\_PR.P006, C006)
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Alias (\_PR.P007, C007)
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Alias (\_PR.P008, C008)
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Alias (\_PR.P009, C009)
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Alias (\_PR.P00A, C00A)
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Alias (\_PR.P00B, C00B)
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Alias (\_PR.P00C, C00C)
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Alias (\_PR.P00D, C00D)
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Alias (\_PR.P00E, C00E)
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Alias (\_PR.P00F, C00F)
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}
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}
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